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make rename doc to match pcb name

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doc/devices/TEG-S562.md → doc/devices/270-NB1-MS206B004A1-REV.A1.md
+2 -2
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@@ -26,11 +26,11 @@ Manufacturer information be found [on the product page](https://www.trendnet.com
Top side Top side
<img src="photos/TEG-S562/TEG-S562-v1.0R-top.jpg" width="300" /> <img src="photos/270-NB1-MS206B004A1-REV.A1/TEG-S562-v1.0R-top.jpg" width="300" />
Bottom Bottom
<img src="photos/TEG-S562/TEG-S562-v1.0R-bottom.jpg" width="300" /> <img src="photos/270-NB1-MS206B004A1-REV.A1/TEG-S562-v1.0R-bottom.jpg" width="300" />
## Connectors ## Connectors
doc/devices/2G5F4_10G2_V1.01.md
+3 -3
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@@ -167,9 +167,9 @@ each cage - the left cage reports `sds_config sds: 01` and the right cage
### Machine target ### Machine target
Build for this device with `make MACHINE=2G5F4_10G2_V1_01`, which selects the Build for this device with `make MACHINE=HONGYAVISION_HYWS_SGT0204S`, which selects the
`machine/2G5F4_10G2_V1_01.c` board definition. It is derived from `machine/HONGYAVISION_HYWS_SGT0204S.c` board definition. It is derived from
`machine/KP_9000_6XHML_X2.c` with the SFP cage order and the reset pin changed. `machine/KEEPLINK_KP_9000_6XHML_X2.c` with the SFP cage order and the reset pin changed.
The fitted T25S40 cannot be read in DIO mode on this board: an image that leaves The fitted T25S40 cannot be read in DIO mode on this board: an image that leaves
DIO enabled does not come up at all, both at the default read clock divider of 4 DIO enabled does not come up at all, both at the default read clock divider of 4
and at 8 (two boards tested), while the same image with single-IO boots and runs and at 8 (two boards tested), while the same image with single-IO boots and runs
doc/devices/HYWS-SGT0108S.md → doc/devices/2G5F_20G_V1.01.md
+6 -6
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@@ -32,15 +32,15 @@ Stock flash chip is 512KB in size. Consider replacing for update through Web UI.
Top side Top side
<img src="photos/HYWS-SGT0108S-unmanaged\Assembled-top.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/Assembled-top.jpg" width="300" />
Front Front
<img src="photos/HYWS-SGT0108S-unmanaged\Assembled-front.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/Assembled-front.jpg" width="300" />
Bottom Bottom
<img src="photos/HYWS-SGT0108S-unmanaged\Assembled-bottom.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/Assembled-bottom.jpg" width="300" />
### PCB overview ### PCB overview
@@ -49,15 +49,15 @@ Bottom
Top side Top side
<img src="photos/HYWS-SGT0108S-unmanaged\PCB-top.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/PCB-top.jpg" width="300" />
Bottom Bottom
<img src="photos/HYWS-SGT0108S-unmanaged\PCB-bot.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/PCB-bot.jpg" width="300" />
Original SPI Flash Chip Original SPI Flash Chip
<img src="photos/HYWS-SGT0108S-unmanaged\og_spi_flash.jpg" width="300" /> <img src="photos/2G5F_20G_V1.01/og_spi_flash.jpg" width="300" />
## Power supply ## Power supply
doc/devices/2M-PCB23-V2_2.md → doc/devices/2M-PCB23-V2.2.md
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@@ -7,7 +7,7 @@
## PCB ## PCB
<img src="photos/2M-PCB23-V2.2-managed/2M-PCB23-V2.2-top.jpg" width="300" /> <img src="photos/2M-PCB23-V2.2/2M-PCB23-V2.2-top.jpg" width="300" />
## Port overview ## Port overview
doc/devices/2M-PCB23-V3_1.md → doc/devices/2M-PCB23-V3.1.md
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@@ -7,7 +7,7 @@
## PCB ## PCB
<img src="photos/2M-PCB23-V3.1-managed/2M-PCB23-V3.1-top.jpeg" width="300" /> <img src="photos/2M-PCB23-V3.1/2M-PCB23-V3.1-top.jpeg" width="300" />
## Port overview ## Port overview
doc/devices/2M-PCB23-V3_2.md → doc/devices/2M-PCB23-V3.2.md
+3 -3
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@@ -10,14 +10,14 @@ The original web interface reports this board as hardware version V3.2
## PCB ## PCB
<img src="photos/2M-PCB23-V3.2-managed/2M-PCB23-V3.2-top.jpeg" width="300" /> <img src="photos/2M-PCB23-V3.2/2M-PCB23-V3.2-top.jpeg" width="300" />
## Compared to V3.1 ## Compared to V3.1
The component placement matches [2M-PCB23-V3.1](2M-PCB23-V3_1.md): same The component placement matches [2M-PCB23-V3.1](2M-PCB23-V3.1.md): same
positions for the flash (U8), the T7/T8/T9/T10 headers, the SFP cage and its positions for the flash (U8), the T7/T8/T9/T10 headers, the SFP cage and its
LED, and the unpopulated U7/U9 footprints. Build with LED, and the unpopulated U7/U9 footprints. Build with
`make MACHINE=KP_9000_9XHML_X_V3_2`, whose board file is a symlink to the V3.1 `make MACHINE=KEEPLINK_KP_9000_9XHML_X_V3_2`, whose board file is a symlink to the V3.1
definition and only differs in the reported name. definition and only differs in the reported name.
## Tested ## Tested
doc/devices/2M-PCB43-V1.1.md
+5 -5
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@@ -15,17 +15,17 @@ and sold by Mokerlink.
The device is fully supported: The device is fully supported:
- All 4 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps - All 4 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules - The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware (build with `make MACHINE=KP_9000_6XHML_X2_V1_1` if building yourself, or use the corresponding pre-compiled binary) - LEDs work with the same indiciations as the OEM firmware (build with `make MACHINE=MOKERLINK_2G040210GSM` if building yourself, or use the corresponding pre-compiled binary)
- untested due to missing Hardware: SFP+ ports equipped with 1G or 2.5G SFPs. - untested due to missing Hardware: SFP+ ports equipped with 1G or 2.5G SFPs.
### Hardware overview ### Hardware overview
Front Front
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-front.jpeg" width="300" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-front.jpeg" width="300" />
Label Label
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-label.jpeg" width="300" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-label.jpeg" width="300" />
### PCB overview ### PCB overview
@@ -34,11 +34,11 @@ Label
Top side Top side
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-top.jpeg" width="300" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-top.jpeg" width="300" />
Bottom Bottom
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-bottom.jpeg" width="300" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-bottom.jpeg" width="300" />
### J1, serial console ### J1, serial console
doc/devices/KP-9000-6XH-X2.md → doc/devices/2M-PCB43-V2.1.md
+10 -10
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@@ -22,9 +22,9 @@ reliable indicator of PCB wiring. The PCB revision defines the hardware layout.
| PCB silkscreen | Known labels / devices | Recommended machine target | Equivalent target | Legacy target | | PCB silkscreen | Known labels / devices | Recommended machine target | Equivalent target | Legacy target |
| --- | --- | --- | --- | --- | | --- | --- | --- | --- | --- |
| `2M-PCB43-V1.1` | Mokerlink 2G040210GSM web-managed 4+2 switch | `MACHINE_KP_9000_6XHML_X2_V1_1` | `MACHINE_KP_9000_6XH_X2_V1_1` | `MACHINE_KP_9000_6XHML_X2` | | `2M-PCB43-V1.1` | Mokerlink 2G040210GSM web-managed 4+2 switch | `MACHINE_MOKERLINK_2G040210GSM` | `MACHINE_KEEPLINK_KP_9000_6XH_V1_1` | `MACHINE_KEEPLINK_KP_9000_6XHML_X2` |
| `2M-PCB43-V1.2` | `KP-9000-6XHML-X2` | `MACHINE_KP_9000_6XHML_X2_V1_2` | `MACHINE_KP_9000_6XH_X2_V1_2` | `MACHINE_KP_9000_6XHML_X2` | | `2M-PCB43-V1.2` | `KP-9000-6XHML-X2` | `MACHINE_KEEPLINK_KP_9000_6XHML_V1_2` | `MACHINE_KEEPLINK_KP_9000_6XH_V1_2` | `MACHINE_KEEPLINK_KP_9000_6XHML_X2` |
| `2M-PCB43-V2.1` | `KP-9000-6XH-X2`, `KP-9000-6XHML-X2` | `MACHINE_KP_9000_6XH_X2_V2_1` or `MACHINE_KP_9000_6XHML_X2_V2_1` | same V2.1 layout | `MACHINE_KP_9000_6XH_X2` | | `2M-PCB43-V2.1` | `KP-9000-6XH-X2`, `KP-9000-6XHML-X2` | `MACHINE_KEEPLINK_KP_9000_6XH_X2_V2_1` or `MACHINE_KEEPLINK_KP_9000_6XHML_V2_1` | same V2.1 layout | `MACHINE_KEEPLINK_KP_9000_6XH_X2` |
The V1.1 and V1.2 boards currently use the same V1.x GPIO, SFP, port and LED The V1.1 and V1.2 boards currently use the same V1.x GPIO, SFP, port and LED
layout. The V2.1 board uses a different V2.1 layout with custom LED muxing. layout. The V2.1 board uses a different V2.1 layout with custom LED muxing.
@@ -42,11 +42,11 @@ new builds should prefer the explicit PCB-revision targets.
Front side: Front side:
<img src="photos/2M-PCB43-V2.1-unmanaged/KP-9000-6XH-X2-front.jpg" width="600" /> <img src="photos/2M-PCB43-V2.1/KP-9000-6XH-X2-front.jpg" width="600" />
Label: Label:
<img src="photos/2M-PCB43-V2.1-unmanaged/KP-9000-6XH-X2-label.jpg" width="600" /> <img src="photos/2M-PCB43-V2.1/KP-9000-6XH-X2-label.jpg" width="600" />
@@ -57,11 +57,11 @@ Label:
Top side Top side
<img src="photos/2M-PCB43-V2.1-unmanaged/2M-PCB43-V2.1-top.jpg" width="600" /> <img src="photos/2M-PCB43-V2.1/2M-PCB43-V2.1-top.jpg" width="600" />
Bottom Bottom
<img src="photos/2M-PCB43-V2.1-unmanaged/2M-PCB43-V2.1-bottom.jpg" width="600" /> <img src="photos/2M-PCB43-V2.1/2M-PCB43-V2.1-bottom.jpg" width="600" />
### Hardware overview: 2M-PCB43-V1.1 / V1.2 ### Hardware overview: 2M-PCB43-V1.1 / V1.2
@@ -71,15 +71,15 @@ Both use the same V1.x layout.
Label: Label:
<img src="photos/KP-9000-6XHML-X2/label.jpg" width="600" /> <img src="photos/2M-PCB43-V2.1/KP-9000-6XH-X2-label.jpg" width="600" />
Top side: Top side:
<img src="photos/KP-9000-6XHML-X2/pcb_top.jpg" width="600" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-top.jpeg" width="600" />
Bottom: Bottom:
<img src="photos/KP-9000-6XHML-X2/pcb_bottom.jpg" width="600" /> <img src="photos/2M-PCB43-V1.1/2M-PCB43-V1.1-bottom.jpeg" width="600" />
## Reset Button ## Reset Button
doc/devices/2M-PCB51-ML-V1_1.md → doc/devices/2M-PCB51-ML-V1.1.md
+4 -4
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@@ -12,11 +12,11 @@ The`KP-9000-9XHP-X` is the KeepLink rebrand for same product.
## Hardware overview ## Hardware overview
Front Front
<img src="photos/POE-2G080110GS/POE-2G080110GS-front.jpg" width="300" /> <img src="photos/2M-PCB51-ML-V1.1/POE-2G080110GS-front.jpg" width="300" />
Label Label
<img src="photos/POE-2G080110GS/POE-2G080110GS-label.jpg" width="300" /> <img src="photos/2M-PCB51-ML-V1.1/POE-2G080110GS-label.jpg" width="300" />
The stock firmware from a POE-2G080110GS device had a sha256sum of `4c280853465eaad80e1772075c0f2d29c11fb8c561547f06353d3a5443c388e9`. The stock firmware from a POE-2G080110GS device had a sha256sum of `4c280853465eaad80e1772075c0f2d29c11fb8c561547f06353d3a5443c388e9`.
@@ -24,11 +24,11 @@ The stock firmware from a POE-2G080110GS device had a sha256sum of `4c280853465e
Top silkscreen is marked `2M-PCB51-ML-V1.1`. PoE is provided by RTL8238C. Flash chip is 4 MB Winbond 25Q32JV (U8). Top silkscreen is marked `2M-PCB51-ML-V1.1`. PoE is provided by RTL8238C. Flash chip is 4 MB Winbond 25Q32JV (U8).
<img src="photos/POE-2G080110GS/POE-2G080110GS-pcb.jpg" width="300" /> <img src="photos/2M-PCB51-ML-V1.1/POE-2G080110GS-pcb.jpg" width="300" />
> [!CAUTION] > [!CAUTION]
> This device operates on mains voltage, which can be a dangerous or potentially lethal hazard. Even after the device is unplugged, high-voltage capacitors can remain charged afterward and may still shock you. Do not attempt to open/disassemble a mains powered device unless you understand how to do so safely. Also, opening the device may void your warranty. > This device operates on mains voltage, which can be a dangerous or potentially lethal hazard. Even after the device is unplugged, high-voltage capacitors can remain charged afterward and may still shock you. Do not attempt to open/disassemble a mains powered device unless you understand how to do so safely. Also, opening the device may void your warranty.
## Notes ## Notes
The stock firmware blinks both the 2.5G and 1G LEDs on activity, despite the front of the device indicating that each LED should be independent. The `POE_2G080110GS` machine config behaves as the front of the device indicates (and what seems more logical) -- each port LED turns on and blinks independently. The stock firmware blinks both the 2.5G and 1G LEDs on activity, despite the front of the device indicating that each LED should be independent. The `MOKERLINK_POE_2G080110GS` machine config behaves as the front of the device indicates (and what seems more logical) -- each port LED turns on and blinks independently.
doc/devices/F7008-2.5.md → doc/devices/F7008-2.5GPOE-V1.2.md
+3 -3
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@@ -27,7 +27,7 @@ Documentation for the unmanaged 8 + 1 switch sold as `7018-2.5G` by Guangnianwei
### Build target ### Build target
``` ```
make MACHINE=F7008_2_5 make MACHINE=GUANGNIANWEI_7018_2_5G
``` ```
### LED wiring ### LED wiring
@@ -57,11 +57,11 @@ The board is marked `F7008-2.5GPOE-V1.2`.
Top side: Top side:
<img src="photos/F7008-2.5/PCB-top.jpg" width="600" /> <img src="photos/F7008-2.5GPOE-V1.2/PCB-top.jpg" width="600" />
Bottom side: Bottom side:
<img src="photos/F7008-2.5/PCB-bottom.jpg" width="600" /> <img src="photos/F7008-2.5GPOE-V1.2/PCB-bottom.jpg" width="600" />
### Hardware notes ### Hardware notes
doc/devices/ZOERAX_HG0402XG_V1.1.md → doc/devices/HG0402XG-V1.1.md
+3 -3
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@@ -12,12 +12,12 @@
- **Ports**: - **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps - 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP+: 1000 / 2500 / 10000 Mbps - 2 × SFP+: 1000 / 2500 / 10000 Mbps
<img src="photos/HG0402XG_V1_1/HG0402XG_V1_1_bottom.jpg" width="300" /> <img src="photos/HG0402XG-V1.1/ZOERAX_HG0402XG_V1_1_bottom.jpg" width="300" />
## PCB ## PCB
<img src="photos/HG0402XG_V1_1/HG0402XG_V1_1_top.jpg" width="300" /> <img src="photos/HG0402XG-V1.1/ZOERAX_HG0402XG_V1_1_top.jpg" width="300" />
<img src="photos/HG0402XG_V1_1/HG0402XG_V1_1_bottom.jpg" width="300" /> <img src="photos/HG0402XG-V1.1/ZOERAX_HG0402XG_V1_1_bottom.jpg" width="300" />
Be aware that the UART header is metric, the pitch is 2mm. The JST PH2.0mm header shown was addeded after purchase Be aware that the UART header is metric, the pitch is 2mm. The JST PH2.0mm header shown was addeded after purchase
doc/devices/STEAMEMO_IG204_V1.md → doc/devices/PB-2131.md
+1 -1
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@@ -26,7 +26,7 @@ Using SPI clamp in-board is the only method for initial installation.
Top side Top side
<img src="photos/STEAMEMO_IG204_V1/PCB-top.jpg" width="600" /> <img src="photos/PB-2131/PCB-top.jpg" width="600" />
### Connectors ### Connectors
### T7, serial console ### T7, serial console
doc/devices/ZX310S-4T2XT.md → doc/devices/PCB-310S-4T2XT-V1.0.0_22273.md
+4 -4
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@@ -17,7 +17,7 @@ PHY 2x RTL8261BE
- 2 x RJ45: 10/100/1000/2500/5000/10000 Mbps - 2 x RJ45: 10/100/1000/2500/5000/10000 Mbps
- **Power**: 12V DC, 2A barrel connector - **Power**: 12V DC, 2A barrel connector
<img src="photos/ZX310S-4T2XT/label.jpg" width="300" /> <img src="photos/PCB-310S-4T2XT-V1.0.0_22273/label.jpg" width="300" />
### What works ### What works
The device is fully supported: The device is fully supported:
@@ -28,15 +28,15 @@ The device is fully supported:
### PCB overview ### PCB overview
**Board markings** **Board markings**
- Top silkscreen: PCB-SL310S-4T2XT-V1.0.0-22273 - Top silkscreen: PCB-310S-4T2XT-V1.0.0_22273
Top side Top side
<img src="photos/ZX310S-4T2XT/pcb_top.jpg" width="300" /> <img src="photos/PCB-310S-4T2XT-V1.0.0_22273/pcb_top.jpg" width="300" />
Bottom Bottom
<img src="photos/ZX310S-4T2XT/pcb_bottom.jpg" width="300" /> <img src="photos/PCB-310S-4T2XT-V1.0.0_22273/pcb_bottom.jpg" width="300" />
### J1, serial console ### J1, serial console
doc/devices/PCB-AFGW_SWTG218ANS_V2.0.2.md → doc/devices/PCB-AFGW-SWTG218ANS_V2.0.2_23308e.md
+4 -4
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@@ -25,21 +25,21 @@ RTL8373-based 8×2.5G PoE + 1×10G SFP+ web-managed switch, sold as the
Front panel: Front panel:
<img src="photos/PCB-AFGW_SWTG218ANS_V2.0.2/device_front.jpg" width="800" /> <img src="photos/PCB-AFGW-SWTG218ANS_V2.0.2_23308e/device_front.jpg" width="800" />
Board mounted in the case, with the internal PSU above it: Board mounted in the case, with the internal PSU above it:
<img src="photos/PCB-AFGW_SWTG218ANS_V2.0.2/dev_top_w_pcb.jpg" width="800" /> <img src="photos/PCB-AFGW-SWTG218ANS_V2.0.2_23308e/dev_top_w_pcb.jpg" width="800" />
### PCB overview ### PCB overview
Top side: Top side:
<img src="photos/PCB-AFGW_SWTG218ANS_V2.0.2/pcb_front.jpg" width="800" /> <img src="photos/PCB-AFGW-SWTG218ANS_V2.0.2_23308e/pcb_front.jpg" width="800" />
Bottom side: Bottom side:
<img src="photos/PCB-AFGW_SWTG218ANS_V2.0.2/pcb_back.jpg" width="800" /> <img src="photos/PCB-AFGW-SWTG218ANS_V2.0.2_23308e/pcb_back.jpg" width="800" />
A 4-pad UART header with `RXD` / `TXD` silkscreened sits next to the right heatsink. A 4-pad UART header with `RXD` / `TXD` silkscreened sits next to the right heatsink.
doc/devices/FNS-1200P.md → doc/devices/PCB-K0402W-U13-V2.0.md
+2 -2
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@@ -30,11 +30,11 @@ Using SPI clamp in-board is the only method for initial installation.
Front panel Front panel
<img src="photos/FNS-1200P/chassis-front.jpg" width="400" /> <img src="photos/PCB-K0402W-U13-V2.0/chassis-front.jpg" width="400" />
Top side (PCB) Top side (PCB)
<img src="photos/FNS-1200P/PCB-top.jpg" width="300" /> <img src="photos/PCB-K0402W-U13-V2.0/PCB-top.jpg" width="300" />
### Port layout ### Port layout
doc/devices/PCB-K0402WS-V1.0.md → doc/devices/PCB-K0402W-V1.0.md
+7 -7
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@@ -6,7 +6,7 @@ The board does have footprints for a VLAN modeswitch at the front and a second f
### Brands ### Brands
* YuanLey YS25-0402 <sup><sub>Note: there are [multiple revisions](PCB-K0402WS-V3.0.md) of the YS25-0402. This first revision lacks the "Vlan" switch cutout on the front of the enclosure.</sub></sup> * YuanLey YS25-0402 <sup><sub>Note: there are [multiple revisions](PCB-K0402W-V3.0.md) of the YS25-0402. This first revision lacks the "Vlan" switch cutout on the front of the enclosure.</sub></sup>
### Programming ### Programming
@@ -14,7 +14,7 @@ Use a SOIC-8 clamp to the flash chip (U1 on silkscreen) at the top of the board,
The board has been seen to ship with a single [BoyaMicro BY25Q16BSSIG](https://www.lcsc.com/datasheet/C382744.pdf) 16Mbit (2MiB) chip, though exact BOM may vary. The board has been seen to ship with a single [BoyaMicro BY25Q16BSSIG](https://www.lcsc.com/datasheet/C382744.pdf) 16Mbit (2MiB) chip, though exact BOM may vary.
<a href="photos/PCB-K0402WS-V1.0/flash.jpg"><img src="photos/PCB-K0402WS-V1.0/flash.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/flash.jpg"><img src="photos/PCB-K0402W-V1.0/flash.jpg" width="300" /></a>
### What works ### What works
@@ -33,19 +33,19 @@ The board has been seen to ship with a single [BoyaMicro BY25Q16BSSIG](https://w
Front panel Front panel
<a href="photos/PCB-K0402WS-V1.0/ports.jpg"><img src="photos/PCB-K0402WS-V1.0/ports.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/ports.jpg"><img src="photos/PCB-K0402W-V1.0/ports.jpg" width="300" /></a>
PCB top PCB top
<a href="photos/PCB-K0402WS-V1.0/pcb-top.jpg"><img src="photos/PCB-K0402WS-V1.0/pcb-top.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/pcb-top.jpg"><img src="photos/PCB-K0402W-V1.0/pcb-top.jpg" width="300" /></a>
PCB bottom PCB bottom
<a href="photos/PCB-K0402WS-V1.0/pcb-bottom.jpg"><img src="photos/PCB-K0402WS-V1.0/pcb-bottom.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/pcb-bottom.jpg"><img src="photos/PCB-K0402W-V1.0/pcb-bottom.jpg" width="300" /></a>
Bottom and rear Bottom and rear
<a href="photos/PCB-K0402WS-V1.0/bottom.jpg"><img src="photos/PCB-K0402WS-V1.0/bottom.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/bottom.jpg"><img src="photos/PCB-K0402W-V1.0/bottom.jpg" width="300" /></a>
### Power supply ### Power supply
@@ -69,4 +69,4 @@ Standard 0.1" / 2.54mm pin headers will not fit, so wires or clips may be used i
The image below shows some oversized clips clumsily attached. The image below shows some oversized clips clumsily attached.
<a href="photos/PCB-K0402WS-V1.0/uart.jpg"><img src="photos/PCB-K0402WS-V1.0/uart.jpg" width="300" /></a> <a href="photos/PCB-K0402W-V1.0/uart.jpg"><img src="photos/PCB-K0402W-V1.0/uart.jpg" width="300" /></a>
doc/devices/PCB-K0402WS-V2.0.md → doc/devices/PCB-K0402W-V2.0.md
+3 -3
View File
@@ -30,15 +30,15 @@ Using SPI clamp in-board is the only method for initial installation.
Front panel Front panel
<img src="photos/PCB-K0402WS-V2.0/chassis-front.jpg" width="400" /> <img src="photos/PCB-K0402W-V2.0/chassis-front.jpg" width="400" />
Bottom label Bottom label
<img src="photos/PCB-K0402WS-V2.0/chassis-bottom.jpg" width="400" /> <img src="photos/PCB-K0402W-V2.0/chassis-bottom.jpg" width="400" />
Top side (PCB) Top side (PCB)
<img src="photos/PCB-K0402WS-V2.0/PCB-top.jpg" width="300" /> <img src="photos/PCB-K0402W-V2.0/PCB-top.jpg" width="300" />
### Port layout ### Port layout
doc/devices/PCB-K0402WS-V3.0.md → doc/devices/PCB-K0402W-V3.0.md
+11 -11
View File
@@ -11,21 +11,21 @@ of the device just above the big label, might be covered by a QC sticker.
* Hisource Hi-K0402WS * Hisource Hi-K0402WS
<img src="photos/PCB-K0402WS-V3.0/HiSource_HI-K0402WS.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/HiSource_HI-K0402WS.jpg" width="300" />
* Ztyuav Z-QWYT0402 * Ztyuav Z-QWYT0402
<img src="photos/PCB-K0402WS-V3.0/Ztyuav_Z-QWYT0402.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/Ztyuav_Z-QWYT0402.jpg" width="300" />
<img src="photos/PCB-K0402WS-V3.0/Ztyuav_Z-QWYT0402_label.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/Ztyuav_Z-QWYT0402_label.jpg" width="300" />
* SICSOLINK SL-G0402F * SICSOLINK SL-G0402F
<img src="photos/PCB-K0402WS-V3.0/SICSOLINK SL-G0402F.jpg" width="300"/> <img src="photos/PCB-K0402W-V3.0/SICSOLINK SL-G0402F.jpg" width="300"/>
* YuanLey YS25-0402 <sup><sub>Note: there are [multiple revisions](PCB-K0402WS-V1.0.md) of the YS25-0402. This is the newer revision that has a "Vlan" switch on the front.</sub></sup> * YuanLey YS25-0402 <sup><sub>Note: there are [multiple revisions](PCB-K0402W-V1.0.md) of the YS25-0402. This is the newer revision that has a "Vlan" switch on the front.</sub></sup>
<img src="photos/PCB-K0402WS-V3.0/YuanLey_YS25-0402.jpg" width="300"/> <img src="photos/PCB-K0402W-V3.0/YuanLey_YS25-0402.jpg" width="300"/>
### Programming ### Programming
@@ -37,7 +37,7 @@ The switch actually controls the HOLD line of each flash chip, and toggling the
If the programming clip keeps HOLD not connected, the flashing will commence on whatever the switch selected, regardless on which chip was clipped. If the programming clip keeps HOLD not connected, the flashing will commence on whatever the switch selected, regardless on which chip was clipped.
For the initial flash (at least with flashrom), the bin file produced by the build is much smaller than the flash chip, it is suggested to pad the file to keep flashrom happy: `truncate -s 2097152 rtlplayground-*-PCB_K0402WS_V3.bin`. Note: do not then proceed to use this resulting padded file for the web flashing (as it bricks the device), use the original unpadded .bin. For the initial flash (at least with flashrom), the bin file produced by the build is much smaller than the flash chip, it is suggested to pad the file to keep flashrom happy: `truncate -s 2097152 rtlplayground-*-HISOURCE_HI_K0402WS_PCB_K0402WS_V3_0.bin`. Note: do not then proceed to use this resulting padded file for the web flashing (as it bricks the device), use the original unpadded .bin.
### What works (expected from label + similar devices) ### What works (expected from label + similar devices)
@@ -52,11 +52,11 @@ For the initial flash (at least with flashrom), the bin file produced by the bui
Top side Top side
<img src="photos/PCB-K0402WS-V3.0/PCB-top.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/PCB-top.jpg" width="300" />
Bottom Bottom
<img src="photos/PCB-K0402WS-V3.0/PCB-bottom.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/PCB-bottom.jpg" width="300" />
### T2, serial console ### T2, serial console
@@ -88,9 +88,9 @@ Voltage is created by chip marked as `Techcode TD1720`.
A reset button can be easily added by soldering a push button from TP131 (near the Spi ROM) to ground via a 1KOhm resistor. A reset button can be easily added by soldering a push button from TP131 (near the Spi ROM) to ground via a 1KOhm resistor.
**PS:** `The reset button GPIO must be defined in the machine.c file before building the image, it must be selected the GPIO30_ACL_BIT3_EN instead of GPIO_NA under the PCB_K0402WS-V3.0 configurations.` **PS:** `The reset button GPIO must be defined in the machine.c file before building the image, it must be selected the GPIO30_ACL_BIT3_EN instead of GPIO_NA under the PCB-K0402W-V3.0 configuration.`
Photo of the mod Photo of the mod
<img src="photos/PCB-K0402WS-V3.0/Reset_mod.jpg" width="300" /> <img src="photos/PCB-K0402W-V3.0/Reset_mod.jpg" width="300" />
doc/devices/K0501W_V2_0.md → doc/devices/PCB-K0501W-V2.0.md
+2 -2
View File
@@ -18,6 +18,6 @@ The BoyaMicro 25Q16BSSIG flash chip is supported by flashprog with chip name "B.
The board is marked `PCB-K0501W-V2.0 DIP-K0501WS-V2.0`. The board is marked `PCB-K0501W-V2.0 DIP-K0501WS-V2.0`.
<img src="photos/K0501W_V2_0/pcb-top.jpg" width="300" /> <img src="photos/PCB-K0501W-V2.0/pcb-top.jpg" width="300" />
<img src="photos/K0501W_V2_0/pcb-bottom.jpg" width="300" /> <img src="photos/PCB-K0501W-V2.0/pcb-bottom.jpg" width="300" />
doc/devices/HI-K0801WS.md → doc/devices/PCB-K0801W-V2.0.md
+3 -3
View File
@@ -21,15 +21,15 @@ Using SPI clamp in-board is the only method for initial installation.
### PCB overview ### PCB overview
**Board markings** **Board markings**
- Top silkscreen: PCB-KO801W-V2.0 / DIP-KO801WS-V2.0 - Top silkscreen: PCB-K0801W-V2.0 / DIP-KO801WS-V2.0
Top side Top side
<img src="photos/K0801W-V2.0-unmanaged\PCB-top.jpg" width="300" /> <img src="photos/PCB-K0801W-V2.0/PCB-top.jpg" width="300" />
Bottom Bottom
<img src="photos/K0801W-V2.0-unmanaged\PCB-bottom.jpg" width="300" /> <img src="photos/PCB-K0801W-V2.0/PCB-bottom.jpg" width="300" />
## Power supply ## Power supply
doc/devices/ZX310S-4T2XH.md → doc/devices/PCB-SL310S-4T1T1X-V1.0.1-24107.md
+3 -3
View File
@@ -22,7 +22,7 @@ PHY RTL8261BE
- 1 × SFP+: 1000 / 2500 / 10000 Mbps - 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 2A barrel connector - **Power**: 12V DC, 2A barrel connector
<img src="photos/ZX310S-4T2XH/label.jpg" width="300" /> <img src="photos/PCB-SL310S-4T1T1X-V1.0.1-24107/label.jpg" width="300" />
### What works ### What works
The device is fully supported: The device is fully supported:
@@ -38,11 +38,11 @@ The device is fully supported:
Top side Top side
<img src="photos/ZX310S-4T2XH/pcb_top.jpg" width="300" /> <img src="photos/PCB-SL310S-4T1T1X-V1.0.1-24107/pcb_top.jpg" width="300" />
Bottom Bottom
<img src="photos/ZX310S-4T2XH/pcb_bottom.jpg" width="300" /> <img src="photos/PCB-SL310S-4T1T1X-V1.0.1-24107/pcb_bottom.jpg" width="300" />
### J1, serial console ### J1, serial console
doc/devices/SWTG018AS_A_V2_0.md → doc/devices/PCB-SWTG018AS-A-V2.0.1_19649.md
+9 -9
View File
@@ -1,14 +1,14 @@
# SWTG018AS-A V2.0 # PCB-SWTG018AS-A V2.0.1_19649
## Brands ## Brands
| Brand | Type |Managed| PCB | Flash | Chip RTL | | Brand | Type |Managed| PCB | Flash | Chip RTL |
|---------|------------------|-------|------------------|-----------------|---------------| |---------|------------------|-------|------------------|-----------------|---------------|
| Ampcom | SWTG018AS-A V2.0 | No | SWTG018AS-A V2.0 | 2MB | 8273N + 8224N | | Ampcom | PCB-SWTG018AS-A V2.0.1_19649 | No | PCB-SWTG018AS-A V2.0.1_19649 | 2MB | 8273N + 8224N |
| Horaco | HC-SWTGW218AS-A | Yes | SWTG018AS-A V2.0 | 2MB(25Q16JVSIQ) | 8273N + 8224N | | Horaco | HC-MOKERLINK_ZX_SWTGW218AS-A | Yes | PCB-SWTG018AS-A V2.0.1_19649 | 2MB(25Q16JVSIQ) | 8273N + 8224N |
| GoodTop | GT-ST018M | Yes | SWTG018AS-A V2.0 | 2MB | 8273N + 8224N | | GoodTop | GT-ST018M | Yes | PCB-SWTG018AS-A V2.0.1_19649 | 2MB | 8273N + 8224N |
| MokerLink | 2G08110GSN | No | SWTG018AS-A V2.0 | 512KB(25Q40) | 8273N + 8224N | | MokerLink | MOKERLINK_2G08110GSN | No | PCB-SWTG018AS-A V2.0.1_19649 | 512KB(25Q40) | 8273N + 8224N |
The following is a documentation for the unmanaged switch marked as `SWTG018AS-A V2.0`. The following is a documentation for the unmanaged switch marked as `PCB-SWTG018AS-A V2.0.1_19649`.
It is e.g. sold under the Ampcom brand, but no branh-markings are found on the device. It is e.g. sold under the Ampcom brand, but no branh-markings are found on the device.
The original software is running UART on 9600 baud rate. The original software is running UART on 9600 baud rate.
@@ -26,7 +26,7 @@ These can be programed independently by using said switch - so it is e.g. possib
- 1 × SFP+: 1000 / 2500 / 10000 Mbps - 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 1A barrel connector - **Power**: 12V DC, 1A barrel connector
<img src="photos/SWTG018AS_A_V_2_0/label.jpg" width="300" /> <img src="photos/PCB-SWTG018AS-A-V2.0.1_19649/label.jpg" width="300" />
### What works ### What works
The device is fully supported: The device is fully supported:
@@ -41,11 +41,11 @@ The device is fully supported:
Top side Top side
<img src="photos/SWTG018AS_A_V_2_0/pcb_top.jpg" width="300" /> <img src="photos/PCB-SWTG018AS-A-V2.0.1_19649/pcb_top.jpg" width="300" />
Bottom Bottom
<img src="photos/SWTG018AS_A_V_2_0/pcb_bottom.jpg" width="300" /> <img src="photos/PCB-SWTG018AS-A-V2.0.1_19649/pcb_bottom.jpg" width="300" />
### J1, serial console ### J1, serial console
doc/devices/SWTG024AS-A-V2.0.1_4C_2SFP.md → doc/devices/PCB-SWTG024AS-A-V2.0.1_19650.md
+5 -5
View File
@@ -1,12 +1,12 @@
### SWTG024AS-A-V2.0.1_4C_2SFP ### SWTG024AS-A-V2.0.1_4C_2SFP
It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO configuration for the SFP port. It is highly similar to PCB-SWTG024AS-V2.0_16895, with the only difference being the GPIO configuration for the SFP port.
## Brands ## Brands
|Brand |Type |Managed|PCB |Flash |Chip RTL| |Brand |Type |Managed|PCB |Flash |Chip RTL|
|---------|--------------|-------|------------------------------|----------------|--------| |---------|--------------|-------|------------------------------|----------------|--------|
| Horaco | ZX-SG4T2 | No | PCB-SWTG024AS-A-V2.0.1_19650 | 512K (P25D40SH)| 8372N | | Horaco | ZX-SG4T2 | No | PCB-SWTG024AS-A-V2.0.1_19650 | 512K (P25D40SH)| 8372N |
| Horaco | HC-SWTG124AS | Yes | PCB-SWTG024AS-A-V2.0.1_19650 | 2M (W25Q16JV)| 8372N | | Horaco | HC-SWTG124AS | Yes | PCB-SWTG024AS-A-V2.0.1_19650 | 2M (W25Q16JV)| 8372N |
| GoodTop | GT-ST024M | Yes | PCB-SWTG024AS-A-V2.0.1 | 2M | 8372N | | GoodTop | GT-ST024M | Yes | PCB-SWTG024AS-A-V2.0.1_19650 | 2M | 8372N |
### Label specifications ### Label specifications
@@ -15,7 +15,7 @@ It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO
- 4 × RJ45: 10/100/1000/2500 Mbps - 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP+: 1000 / 2500 / 10000 Mbps - 2 × SFP+: 1000 / 2500 / 10000 Mbps
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-label.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-A-V2.0.1_19650/horaco-zx-sg4t2-label.jpg" width="300" />
### What works ### What works
The device is fully supported: The device is fully supported:
@@ -29,11 +29,11 @@ The device is fully supported:
Top side Top side
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-pcb-top.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-A-V2.0.1_19650/horaco-zx-sg4t2-pcb-top.jpg" width="300" />
Bottom Bottom
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-pcb-bottom.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-A-V2.0.1_19650/horaco-zx-sg4t2-pcb-bottom.jpg" width="300" />
On Horaco HC-SWTG124AS with board PCB-SWTG024AS-A-V2.0.1_19650 the reset button is soldered at `SW1` (on the top left, GPIO48). On Horaco HC-SWTG124AS with board PCB-SWTG024AS-A-V2.0.1_19650 the reset button is soldered at `SW1` (on the top left, GPIO48).
doc/devices/SWTG024AS.md → doc/devices/PCB-SWTG024AS-V2.0-17452.md
+2 -2
View File
@@ -10,12 +10,12 @@ Also the RJ45 connectors can be all plastic/non-shielded or with metal shielding
|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|
| LIANGUO |SWTG024AS |No| SWTG024AS-v2.0-17452 | CM-23-11-2336 023-17453| 512 KiB | 8272 | | LIANGUO |SWTG024AS |No| SWTG024AS-v2.0-17452 | CM-23-11-2336 023-17453| 512 KiB | 8272 |
| Horaco |ZX-SWTG124AS | Yes | SWTG024AS-v2.0 | ??? | ??? | 8272 | | Horaco |ZX-SWTG124AS | Yes | SWTG024AS-v2.0 | ??? | ??? | 8272 |
| Xikestore |SKS3200M-4GPY2XF | Yes | SWTG024AS-v1.0 | CM-23-08-2043 023-16721 | 2048 KiB | 8272 | | Xikestore |SKS3200M-4GPY2XF | Yes | PCB-SWTG024AS-V2.0-17452 | CM-23-08-2043 023-16721 | 2048 KiB | 8272 |
| Sodola | SL-SWTG124AS-D | Yes | SWTG024AS-v2.0-17452 | ??? | 2048 KiB | 8272 | | Sodola | SL-SWTG124AS-D | Yes | SWTG024AS-v2.0-17452 | ??? | 2048 KiB | 8272 |
## PCB ## PCB
<img src="photos/SWTG024AS-v2.0-unmanaged/SWTG024AS-v2.0-top-uman.png" width="300" /> <img src="photos/SWTG024AS-V2.0-LIANGUO/SWTG024AS-v2.0-top-uman.png" width="300" />
# SWTG024AS-v2.0 managed vs unmanged # SWTG024AS-v2.0 managed vs unmanged
Changes I found with my board vs [Managed version](https://github.com/up-n-atom/SWTG118AS/tree/main/photos/SWGT024AS-v2.0) of the PCB. Changes I found with my board vs [Managed version](https://github.com/up-n-atom/SWTG118AS/tree/main/photos/SWGT024AS-v2.0) of the PCB.
doc/devices/SWTG024AS-V2.0.md → doc/devices/PCB-SWTG024AS-V2.0_16895.md
+5 -5
View File
@@ -1,4 +1,4 @@
### SWTG024AS-V2.0 ### PCB-SWTG024AS-V2.0_16895
## Brands ## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL| |Brand|Type|Managed|PCB|Flash|Chip RTL|
@@ -13,7 +13,7 @@
- 1 × SFP+: 1000 / 2500 / 10000 Mbps - 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 1A 5525 connector - **Power**: 12V DC, 1A 5525 connector
<img src="photos/SWTG024AS-V2.0/label.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.0_16895/label.jpg" width="300" />
### What works ### What works
The device is fully supported: The device is fully supported:
@@ -24,15 +24,15 @@ The device is fully supported:
### PCB overview ### PCB overview
**Board markings** **Board markings**
- Top silkscreen: PCB-SWTG024AS-V2.0 - Top silkscreen: PCB-SWTG024AS-V2.0_16895
Top side Top side
<img src="photos/SWTG024AS-V2.0/pcb_top.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.0_16895/pcb_top.jpg" width="300" />
Bottom Bottom
<img src="photos/SWTG024AS-V2.0/pcb_bottom.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.0_16895/pcb_bottom.jpg" width="300" />
### J1, serial console ### J1, serial console
doc/devices/SWTG024AS-V2.1.0.md → doc/devices/PCB-SWTG024AS-V2.1.0_19023.md
+4 -4
View File
@@ -14,7 +14,7 @@
- **Power**: 1A @ 12V DC - **Power**: 1A @ 12V DC
#### Xikestore SKS-3200-4E2X label #### Xikestore SKS-3200-4E2X label
<img src="photos/SWTG024AS-V2.1.0/label.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.1.0_19023/label.jpg" width="300" />
### What works ### What works
- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps - ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
@@ -24,15 +24,15 @@
### PCB overview ### PCB overview
**Board markings** **Board markings**
- Top silkscreen: PCB-SWTG024AS-V2.1.0 - Top silkscreen: PCB-SWTG024AS-V2.1.0_19023
Top side Top side
<img src="photos/SWTG024AS-V2.1.0/pcb-top.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.1.0_19023/pcb-top.jpg" width="300" />
Bottom Bottom
<img src="photos/SWTG024AS-V2.1.0/pcb-bottom.jpg" width="300" /> <img src="photos/PCB-SWTG024AS-V2.1.0_19023/pcb-bottom.jpg" width="300" />
### Serial console ### Serial console
doc/devices/PCB-SWTG118AS-V2.0-16029.md
+31
View File
@@ -0,0 +1,31 @@
### ZX-MOKERLINK_ZX_SWTGW218AS
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Mokerlink | ZX-MOKERLINK_ZX_SWTGW218AS | Yes| PCB-SWTG118AS-V2.0-16029 | 2MB (FM25Q16A)| 8273N + 8224N |
| Sodola | | | | | |
| Horaco | HC-MOKERLINK_ZX_SWTGW218AS | Yes | SWTG118AS-V2.1 | 2MB | 8373 (non-N) |
| XikeStor | SKS3200-8E1X | Yes | SWTG118AS-V2.1-17462 | 2MB (25Q16JVSIQ) | |
All boards in this table use `MACHINE=MOKERLINK_ZX_SWTGW218AS`. The Horaco HC-MOKERLINK_ZX_SWTGW218AS is also sold with the
[PCB-SWTG018AS-A V2.0.1_19649](PCB-SWTG018AS-A-V2.0.1_19649.md) board, which needs a different firmware. Check the marking
on the PCB before flashing.
The PHY and flash-chip models for the tested Horaco units remain unverified.
## Photos
<img src="photos/PCB-SWTG118AS-V2.0-16029/front.png" width="800" />
<img src="photos/PCB-SWTG118AS-V2.0-16029/label.jpg" width="800" />
## PCB
See up'n'atom's Repo:
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-top.JPG
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-bottom.JPG
doc/devices/Hasivo-S1100P-8GT-1SX-S.md → doc/devices/S1100P-8GT-1SX-73N-S-V1.01.md
+4 -4
View File
@@ -1,4 +1,4 @@
# Hasivo S1100P-8GT-1SX-S # Hasivo S1100P-8GT-1SX-73N-S-V1.01
RTL8373N switch with 8 × 2.5G RJ45 ports and 1 × SFP port. GD25Q16 2 MiB flash. RTL8373N switch with 8 × 2.5G RJ45 ports and 1 × SFP port. GD25Q16 2 MiB flash.
@@ -29,13 +29,13 @@ PoE is managed by an RTL8238B and a separate STC8H8K64U controller, not directly
Front panel: Front panel:
![Front panel](photos/Hasivo-S1100P-8GT-1SX-S/front.jpg) ![Front panel](photos/S1100P-8GT-1SX-73N-S-V1.01/front.jpg)
PCB top: PCB top:
![PCB top](photos/Hasivo-S1100P-8GT-1SX-S/pcb_top.jpg) ![PCB top](photos/S1100P-8GT-1SX-73N-S-V1.01/pcb_top.jpg)
PCB bottom: PCB bottom:
![PCB bottom](photos/Hasivo-S1100P-8GT-1SX-S/pcb_bottom.jpg) ![PCB bottom](photos/S1100P-8GT-1SX-73N-S-V1.01/pcb_bottom.jpg)
doc/devices/HASIVO_S1100WP_8GT_1SX_SE.md → doc/devices/S1100W-8GT-1SX_SE-V1.05.md
+4 -4
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@@ -22,21 +22,21 @@ RTL8373-based 8×2.5G PoE + 1×SFP switch.
Front panel: Front panel:
<img src="photos/HASIVO_S1100WP-8GT-1SX-SE/front.jpg" width="600" /> <img src="photos/S1100W-8GT-1SX_SE-V1.05/front.jpg" width="600" />
Label: Label:
<img src="photos/HASIVO_S1100WP-8GT-1SX-SE/label.jpg" width="600" /> <img src="photos/S1100W-8GT-1SX_SE-V1.05/label.jpg" width="600" />
### PCB overview ### PCB overview
Top side: Top side:
<img src="photos/HASIVO_S1100WP-8GT-1SX-SE/pcb_top.jpg" width="600" /> <img src="photos/S1100W-8GT-1SX_SE-V1.05/pcb_top.jpg" width="600" />
Bottom side: Bottom side:
<img src="photos/HASIVO_S1100WP-8GT-1SX-SE/pcb_bottom.jpg" width="600" /> <img src="photos/S1100W-8GT-1SX_SE-V1.05/pcb_bottom.jpg" width="600" />
### Port layout ### Port layout
doc/devices/S25G1109FP_V1_3.md → doc/devices/S25G1109FP-V1.3.md
+6 -6
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@@ -38,7 +38,7 @@ The two large ICs sit under soldered heatsinks, their markings are not readable.
## Build ## Build
``` ```
make MACHINE=S25G1109FP_V1_3 CI=1 make MACHINE=SIRIVISION_SR_S25G2109F CI=1
``` ```
The resulting image can be uploaded through the web interface (`System` page) The resulting image can be uploaded through the web interface (`System` page)
@@ -129,20 +129,20 @@ globally administered address stored there is used instead.
Front panel: Front panel:
![Front panel](photos/S25G1109FP_V1_3/front.jpg) ![Front panel](photos/S25G1109FP-V1.3/front.jpg)
Label: Label:
![Label](photos/S25G1109FP_V1_3/label.jpg) ![Label](photos/S25G1109FP-V1.3/label.jpg)
PCB top side: PCB top side:
![PCB top side](photos/S25G1109FP_V1_3/pcb_top.jpg) ![PCB top side](photos/S25G1109FP-V1.3/pcb_top.jpg)
PCB bottom side: PCB bottom side:
![PCB bottom side](photos/S25G1109FP_V1_3/pcb_bottom.jpg) ![PCB bottom side](photos/S25G1109FP-V1.3/pcb_bottom.jpg)
Flash chip, GigaDevice 25Q16ESIG: Flash chip, GigaDevice 25Q16ESIG:
![Flash chip](photos/S25G1109FP_V1_3/flash.jpg) ![Flash chip](photos/S25G1109FP-V1.3/flash.jpg)
doc/devices/SIRIVISION_S25G2206FP_V1_1.md → doc/devices/S25G2206FP-V1.1.md
+1 -1
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@@ -25,7 +25,7 @@ The device is fully supported:
Top side Top side
<img src="photos/SIRIVISION_S25G2206FP_V1_1/dev_pcb_top.jpg" width="300" /> <img src="photos/S25G2206FP-V1.1/dev_pcb_top.jpg" width="300" />
## Power supply ## Power supply
doc/devices/SWTG024AS-A-V2.0.1_5C_1SFP.md → doc/devices/SWTG024AS-A-V2.0.1-HORACO.md
+1 -1
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@@ -1,5 +1,5 @@
### SWTG024AS-A-V2.0.1_5C_1SFP ### SWTG024AS-A-V2.0.1_5C_1SFP
It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO configuration for the SFP port. It is highly similar to PCB-SWTG024AS-V2.0_16895, with the only difference being the GPIO configuration for the SFP port.
## Brands ## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL| |Brand|Type|Managed|PCB|Flash|Chip RTL|
doc/devices/ONT-S207CW-62TS-SE.md → doc/devices/SWTG024AS-A-V2.0.1-ONT.md
+3 -3
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@@ -18,13 +18,13 @@ ONT-S207CW-62TS-SE, Binardat 2G06-04210GSM (managed), and Binardat 2G06-04210GS
### Binardat 2G06-04210GSM ### Binardat 2G06-04210GSM
**Front View:** **Front View:**
<img src="photos/ONT-S207CW-Binardat-2G06-04210GSM/binardat-2g06-04210gsm-front.jpg" width="400" /> <img src="photos/SWTG024AS-A-V2.0.1-ONT/binardat-2g06-04210gsm-front.jpg" width="400" />
**Back View:** **Back View:**
<img src="photos/ONT-S207CW-Binardat-2G06-04210GSM/binardat-2g06-04210gsm-back.jpg" width="400" /> <img src="photos/SWTG024AS-A-V2.0.1-ONT/binardat-2g06-04210gsm-back.jpg" width="400" />
**PCB View:** **PCB View:**
<img src="photos/ONT-S207CW-Binardat-2G06-04210GSM/binardat-2g06-04210gsm-pcb.jpg" width="400" /> <img src="photos/SWTG024AS-A-V2.0.1-ONT/binardat-2g06-04210gsm-pcb.jpg" width="400" />
*Photos courtesy of [andreas5232](https://github.com/andreas5232) from [emesix/ONT-S207CW-62TS-SE#1](https://github.com/emesix/ONT-S207CW-62TS-SE/issues/1)* *Photos courtesy of [andreas5232](https://github.com/andreas5232) from [emesix/ONT-S207CW-62TS-SE#1](https://github.com/emesix/ONT-S207CW-62TS-SE/issues/1)*
doc/devices/SWTGW215AS.md → doc/devices/SWTG115AS-V2.0.md
+17 -17
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@@ -17,17 +17,17 @@ Port 5 RJ45 is interfaced through a RTL8221B IC.
## Label (V2.0) ## Label (V2.0)
<img src="photos/ZX-SWTGW215AS-V2.0/label.jpg" width="300" /> <img src="photos/SWTG115AS-V2.0/label.jpg" width="300" />
## PCB (V2.0) ## PCB (V2.0)
<img src="photos/ZX-SWTGW215AS-V2.0/pcb_top.jpg" width="300" /> <img src="photos/SWTG115AS-V2.0/pcb_top.jpg" width="300" />
<img src="photos/ZX-SWTGW215AS-V2.0/pcb_bottom.jpg" width="300" /> <img src="photos/SWTG115AS-V2.0/pcb_bottom.jpg" width="300" />
## PCB (V2.1) ## PCB (V2.1)
<img src="photos/ZX-SWTGW215AS-V2.1/pcb-top.jpg" width="300" /> <img src="photos/SWTG115AS-V2.1/pcb-top.jpg" width="300" />
<img src="photos/ZX-SWTGW215AS-V2.1/pcb-bottom.jpg" width="300" /> <img src="photos/SWTG115AS-V2.1/pcb-bottom.jpg" width="300" />
## Connectors ## Connectors
@@ -69,7 +69,7 @@ Port 5 RJ45 is interfaced through a RTL8221B IC.
This connector goes to U4 `I2C EEPROM` and U10 `SPI FLASH` (mappings identical to SWTG024AS). This connector goes to U4 `I2C EEPROM` and U10 `SPI FLASH` (mappings identical to SWTG024AS).
For detailed Slave Interface functionality and protocol information, see [T3 documentation in SWTG024AS.md](SWTG024AS.md#t3-slave-interface). For detailed Slave Interface functionality and protocol information, see [T3 documentation in SWTG024AS.md](PCB-SWTG024AS-V2.0-17452.md#t3-slave-interface).
|`T3` pin|what|Signal| |`T3` pin|what|Signal|
|---|---|---| |---|---|---|
@@ -109,7 +109,7 @@ For detailed Slave Interface functionality and protocol information, see [T3 doc
#### Notes #### Notes
* 1 pin is square shaped. * 1 pin is square shaped.
* Mapping unverified but assumed the same as [LIANGUO SWTG024AS](SWTG024AS.md#t8). * Mapping unverified but assumed the same as [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#t8).
## Reset Circuit ## Reset Circuit
| Function | GPIO | | Function | GPIO |
@@ -121,7 +121,7 @@ For detailed Slave Interface functionality and protocol information, see [T3 doc
## GPIO ## GPIO
Note: T3/U4/U10-related signal annotations below are copied from [LIANGUO SWTG024AS T3 section](SWTG024AS.md#t3-slave-interface) as well as T8 port from [LIANGUO SWTG024AS T8 section](SWTG024AS.md#t8). They should be treated as assumed identical for ZX-SWTGW215AS as it has not been 100% confirmed true at the moment. Note: T3/U4/U10-related signal annotations below are copied from [LIANGUO SWTG024AS T3 section](PCB-SWTG024AS-V2.0-17452.md#t3-slave-interface) as well as T8 port from [LIANGUO SWTG024AS T8 section](PCB-SWTG024AS-V2.0-17452.md#t8). They should be treated as assumed identical for ZX-SWTGW215AS as it has not been 100% confirmed true at the moment.
| HEX VAL. | GPIO | Component / Purpose | Notes | | GPIO | Component / Purpose | Notes | | HEX VAL. | GPIO | Component / Purpose | Notes | | GPIO | Component / Purpose | Notes |
| -------- | ------ | ---- | ---- | ---- | ---- | ---- | ---- | | -------- | ------ | ---- | ---- | ---- | ---- | ---- | ---- |
@@ -135,14 +135,14 @@ Note: T3/U4/U10-related signal annotations below are copied from [LIANGUO SWTG02
| 00000080 | GPIO07 | | | | GPIO39 | J4-4 | SFP I2C SDA | | 00000080 | GPIO07 | | | | GPIO39 | J4-4 | SFP I2C SDA |
| 00000100 | GPIO08 | | | | GPIO40 | J4-5 | SFP I2C SCL | | 00000100 | GPIO08 | | | | GPIO40 | J4-5 | SFP I2C SCL |
| 00000200 | GPIO09 | | | | GPIO41 | | | | 00000200 | GPIO09 | | | | GPIO41 | | |
| 00000400 | GPIO10 | | | | GPIO42 | U10-P6, U4-P6, T3-1 | SPI FLASH CLK / I2C-SCL (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00000400 | GPIO10 | | | | GPIO42 | U10-P6, U4-P6, T3-1 | SPI FLASH CLK / I2C-SCL (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00000800 | GPIO11 | | | | GPIO43 | U10-P5, U4-P5, T3-3 | SPI FLASH DI/IO0 / I2C-SDA (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00000800 | GPIO11 | | | | GPIO43 | U10-P5, U4-P5, T3-3 | SPI FLASH DI/IO0 / I2C-SDA (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00001000 | GPIO12 | | | | GPIO44 | U10-P2, T3-5 | SPI FLASH DO/IO1 (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00001000 | GPIO12 | | | | GPIO44 | U10-P2, T3-5 | SPI FLASH DO/IO1 (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00002000 | GPIO13 | PORT1 LED GREEN | | | GPIO45 | U10-P1, T3-6 | SPI FLASH CS (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00002000 | GPIO13 | PORT1 LED GREEN | | | GPIO45 | U10-P1, T3-6 | SPI FLASH CS (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00004000 | GPIO14 | PORT1 LED ORANGE | | | GPIO46 | T8-1 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00004000 | GPIO14 | PORT1 LED ORANGE | | | GPIO46 | T8-1 | (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00008000 | GPIO15 | | | | GPIO47 | T8-5 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00008000 | GPIO15 | | | | GPIO47 | T8-5 | (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00010000 | GPIO16 | PORT2 LED GREEN | | | GPIO48 | T8-3 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00010000 | GPIO16 | PORT2 LED GREEN | | | GPIO48 | T8-3 | (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00020000 | GPIO17 | PORT2 LED ORANGE | | | GPIO49 | T8-6 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) | | 00020000 | GPIO17 | PORT2 LED ORANGE | | | GPIO49 | T8-6 | (from [LIANGUO SWTG024AS](PCB-SWTG024AS-V2.0-17452.md#gpio)) |
| 00040000 | GPIO18 | PORT3 LED GREEN | | | GPIO50 | | | | 00040000 | GPIO18 | PORT3 LED GREEN | | | GPIO50 | | |
| 00080000 | GPIO19 | PORT3 LED ORANGE | | | GPIO51 | | | | 00080000 | GPIO19 | PORT3 LED ORANGE | | | GPIO51 | | |
| 00100000 | GPIO20 | PORT4 LED GREEN | | | GPIO52 | | | | 00100000 | GPIO20 | PORT4 LED GREEN | | | GPIO52 | | |
@@ -177,7 +177,7 @@ Note: T3/U4/U10-related signal annotations below are copied from [LIANGUO SWTG02
## Notes ## Notes
While [SWTG024AS.md](SWTG024AS.md) can be used as a general reference for hardware concepts and interface specifications, this device should not be assumed to be identical beside the difference implicitely highlighted below. Not all information has been validated for compatibility with the SWTG215AS. Consult the SWTG024AS documentation with caution and verify any critical details against this device's. While [SWTG024AS.md](PCB-SWTG024AS-V2.0-17452.md) can be used as a general reference for hardware concepts and interface specifications, this device should not be assumed to be identical beside the difference implicitely highlighted below. Not all information has been validated for compatibility with the SWTG215AS. Consult the SWTG024AS documentation with caution and verify any critical details against this device's.
## Flashing ## Flashing
doc/devices/SWTGW218AS.md
-31
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@@ -1,31 +0,0 @@
### ZX-SWTGW218AS
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Mokerlink | ZX-SWTGW218AS | Yes| SWTG118AS-V2.0-16029 | 2MB (FM25Q16A)| 8273N + 8224N |
| Sodola | | | | | |
| Horaco | HC-SWTGW218AS | Yes | SWTG118AS-V2.1 | 2MB | 8373 (non-N) |
| XikeStor | SKS3200-8E1X | Yes | SWTG118AS-V2.1-17462 | 2MB (25Q16JVSIQ) | |
All boards in this table use `MACHINE=SWTGW218AS`. The Horaco HC-SWTGW218AS is also sold with the
[SWTG018AS-A V2.0](SWTG018AS_A_V2_0.md) board, which needs a different firmware. Check the marking
on the PCB before flashing.
The PHY and flash-chip models for the tested Horaco units remain unverified.
## Photos
<img src="photos/SWTGW218AS-managed/front.png" width="800" />
<img src="photos/SWTGW218AS-managed/label.jpg" width="800" />
## PCB
See up'n'atom's Repo:
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-top.JPG
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-bottom.JPG
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