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Add phy_write() with bit_mask lookup inside the function.

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Move the lookup saves a lot of instructions for every phy_write() call.

Assembly diff for one change.
< ;     rtl837x_phy.c:240: phy_write_mask(bit_mask[port], 0x07, 0x00, 0x3200);  // Enable AN
<       mov     dpl,r5
<       mov     dph,r6
---
> ;     rtl837x_phy.c:240: phy_write(port, 0x07, 0x00, 0x3200); // Enable AN
>       mov     _phy_write_PARM_2,#0x07
1345,1359c1019,1024
<       movc    a,@a+dptr
<       mov     r5,a
<       inc     dptr
<       clr     a
<       movc    a,@a+dptr
<       mov     r6,a
<       mov     _phy_write_mask_PARM_2,#0x07
<       clr     a
<       mov     _phy_write_mask_PARM_3,a
<       mov     (_phy_write_mask_PARM_3 + 1),a
<       mov     _phy_write_mask_PARM_4,a
<       mov     (_phy_write_mask_PARM_4 + 1),#0x32
<       mov     dpl, r5
<       mov     dph, r6
<       lcall   _phy_write_mask
---
>       mov     _phy_write_PARM_3,a
>       mov     (_phy_write_PARM_3 + 1),a
>       mov     _phy_write_PARM_4,a
>       mov     (_phy_write_PARM_4 + 1),#0x32
>       mov     dpl, r7
>       lcall   _phy_write

Replace all phy_write_mask(bit_mask[<var>], ...) to phy phy_write(<var>, ...).
This commit is contained in:
René van Dorst
2025-09-01 00:12:12 +02:00
parent d6ea9be4c0
commit 7ff028303d
3 changed files with 47 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files
rtlplayground.c
+24
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@@ -1099,6 +1099,30 @@ void phy_write_mask(uint16_t phy_mask, uint8_t dev_id, uint16_t reg, uint16_t v)
} while (SFR_EXEC_STATUS != 0);
}
/*
* Write a register reg of phy, using a mask to select them, in page page
* Data to be written is in v
*/
void phy_write(uint8_t phy_id, uint8_t dev_id, uint16_t reg, uint16_t v)
{
uint16_t phy_mask = bit_mask[phy_id];
#ifdef REGDBG
print_string("P"); print_byte(phy_mask>>8); print_byte(phy_mask); print_byte(dev_id); write_char('.'); print_byte(reg>>8); print_byte(reg); write_char(':');
print_byte(v>>8); print_byte(v); write_char(' ');
#endif
SFR_DATA_8 = v >> 8; // SFR_A6
SFR_DATA_0 = v; // SFR_A7
SFR_SMI_PHYMASK = phy_mask; // SFR_C5
SFR_SMI_REG_H = reg >> 8; // SFR_C2
SFR_SMI_REG_L = reg; // SFR_C3
SFR_SMI_DEV = (phy_mask >> 8) | dev_id << 3 | 2; // SFR_C4: bit 2 can also be set for some option
SFR_EXEC_GO = SFR_EXEC_WRITE_SMI;
do {
} while (SFR_EXEC_STATUS != 0);
}
/*
* Read a phy register via MDIO clause 45