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Merge pull request #632 from gtytup/2g5f4-10g2-v1.01-v2
New Device: Add support for the hongyavision HYWS-SGT0204S (2G5F4_10G2_V1.01)
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hongyavision HYWS-SGT0204S
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RTL8372-based 4×2.5G + 2×SFP+ unmanaged switch.
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Also marked on the PCB as `2G5F4_10G2_V1.01`.
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Stock firmware runs a factory test console on UART at 9600 baud 8N1 (banner
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`RTL8371B start`, prompt `RTL8371B:`). There is no management CLI and no Web
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interface.
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Using SPI clamp in-board is the only method for initial installation and update.
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Erase the whole chip and verify the write (`flashrom -v`) before powering the
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board, so an incomplete write is caught before the board is powered up.
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Stock flash chip is 512 KB (Bright Moon `T25S40`, 4 Mbit, SOP-8), which the
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RTLPlayground image fills exactly.
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### Label specifications
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Case, top / front / nameplate:
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<img src="photos/2G5F4_10G2_V1.01/assembled-top.jpg" width="300" />
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<img src="photos/2G5F4_10G2_V1.01/assembled-front.jpg" width="300" />
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<img src="photos/2G5F4_10G2_V1.01/assembled-bottom.jpg" width="300" />
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- **Manufacturer**: hongyavision (Shenzhen Hongyavision Electronic Technology
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Co., Ltd.)
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- **Model**: HYWS-SGT0204S — the nameplate is printed in Chinese and reads
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"10/100/1000/2500M fibre switch" and "4x 2.5G copper port + 2x 10G SFP+
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optical port"
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- **Ports**:
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- 4 × RJ45: 10/100/1000/2500 Mbps
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- 2 × SFP+: 1G / 2.5G / 10G
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- **Power**: 12 V DC, 2 A
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- **Serial number**: `S/N-YYYYMMDDNNNN`, e.g. `S/N-202312010028`
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The top of the case only carries generic printing ("2.5G+10G High Speed Fiber
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Transceiver / 4-Port 2.5G Ethernet Switch+10G Fiber"), so the nameplate on the
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bottom is what identifies the device.
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### What works
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- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
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- Both SFP+ ports supporting 1G, 2.5G and 10G modules
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- Copper LEDs: white (2.5G) and blue (link/activity)
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- SFP LEDs: one single LED per port (link/activity)
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- SFP EEPROM and DDM readable on both cages, verified with a 10G module
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(`Rate: 0x67`, module identity and DDM values via the `sfp` console command)
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- Serial console at 115200 8N1 (RTLPlayground) / 9600 8N1 (stock)
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### Not verified
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- The reset button footprint is unpopulated and the case has no opening for it,
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so it could not be tested.
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### PCB overview
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**Board markings**
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- Top silkscreen: `2G5F4_10G2_V1.01`
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**Key components**
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- Main switch: RTL8372 (RTL8371B family), reported as `RTL8372` (non-N) by
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RTLPlayground. The chip sits under a heatsink and its package marking is not
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readable.
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- U1: SPI NOR flash, Bright Moon `T25S40`, 4 Mbit / 512 KB, SOP-8
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- A 3-hole reset button footprint is present but unpopulated, and the case has
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no opening for it, so there is no usable reset button
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Top side:
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<img src="photos/2G5F4_10G2_V1.01/pcb_top.jpg" width="600" />
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Bottom:
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<img src="photos/2G5F4_10G2_V1.01/pcb_bottom.jpg" width="600" />
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The stock flash chip, Bright Moon `T25S40` (SOP-8, 4 Mbit / 512 KB):
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<img src="photos/2G5F4_10G2_V1.01/flash_t25s40.jpg" width="300" />
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### Port layout
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| Front panel position | Logical port | Physical port | Type |
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|----------------------|--------------|---------------|---------|
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| SFP left | 8 | 5 | SFP+ |
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| RJ45 1 | 4 | 1 | Copper |
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| RJ45 2 | 5 | 2 | Copper |
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| RJ45 3 | 6 | 3 | Copper |
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| RJ45 4 | 7 | 4 | Copper |
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| SFP right | 3 | 6 | SFP+ |
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Copper ports 1–4 match the KP-9000-6XH-X2 (2M-PCB43-V1.1) layout, which this
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board is a sibling of. The two SFP+ cages are wired the other way round
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compared to that board: physical port 5 is on SDS1 and physical port 6 is on
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SDS0.
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### Serial console
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The board has three through-holes used as the serial console, next to the
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heatsink in the middle of the board and visible in the top side photo above (the
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silkscreen labels are printed rotated by 90°). **The silkscreen labels are
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wrong**: they are shifted relative to the actual signals.
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| Silkscreen label | Actual signal |
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|------------------|---------------|
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| TX | GND |
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| RX | TX |
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| GND | RX |
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Wiring (following the measured signals, not the labels):
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| USB-TTL adapter | Board pad |
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|-----------------|----------------------|
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| GND | pad labelled `TX` |
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| RX | pad labelled `RX` |
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| TX | pad labelled `GND` |
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- **Settings**: 115200 baud / 8N1 / 3.3V TTL (RTLPlayground), 9600 baud for the
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stock firmware
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- The stock firmware only prints a few bytes and a factory test menu
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(`?`, `rst`, `f`, `r`, `10`, `100`, `g1`, `sd`, `eye`, …); it is not an
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interactive management console
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### LED configuration
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Case silkscreen, below the RJ45 ports:
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```
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White : 2.5G Blue : 1000M/2500M L/A
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```
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The front panel also carries a `PWR` LED and one LED per SFP cage (`SFP1`,
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`SFP2`) on the right hand side.
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| Port | LED | Linked, idle | With traffic |
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|------------|--------------|--------------|--------------|
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| Copper | white | 2.5G only | same |
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| Copper | blue | solid | blinks (L/A) |
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| SFP | single LED | solid | blinks (L/A) |
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Measured LED-ID mapping (from the RTL837x LED set registers):
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| LED-ID | Function |
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|--------|---------------------------------|
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| LED-ID0| copper blue LED |
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| LED-ID1| copper white LED |
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| LED-ID2| SFP single LED |
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**Important**: `RTL837X_REG_LED_GLB_IO_EN` bit 6 must be set in
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`machine_custom_init()`. Without it the RTL837x "solid" conditions (LINK/speed)
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do not drive the LEDs at all and only `ACT` does, which makes the white LED
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glow faintly at non-2.5G speeds.
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### SFP GPIO assignments
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| SFP | pin\_detect (ModAbs) | pin\_los | SerDes | I2C SDA | I2C SCL |
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|-------------------|-------------------------------|------------------|--------|-------------------------|--------------------------|
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| Left (logical 8, physical 5) | GPIO30\_ACL\_BIT3\_EN | GPIO37 | SDS1 | GPIO39\_I2C\_SDA4 | GPIO40\_I2C\_SCL3\_MDC1 |
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| Right (logical 3, physical 6)| GPIO50\_I2C\_SCL2\_UART1\_TX | GPIO10\_LED10 | SDS0 | GPIO41\_I2C\_SDA3\_MDIO1 | GPIO40\_I2C\_SCL3\_MDC1 |
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`pin_tx_disable` is GPIO\_NA on both ports. Both I2C buses are confirmed
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working: with the same 10G module inserted, the `sfp` console command reads its
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vendor and model from the left cage (`Slot 1`) and from the right cage
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(`Slot 2`), DDM values included. The insertion also shows which SerDes drives
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each cage - the left cage reports `sds_config sds: 01` and the right cage
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`sds: 00`, which matches the table above.
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### Machine target
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Build for this device with `make MACHINE=2G5F4_10G2_V1_01`, which selects the
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`machine/2G5F4_10G2_V1_01.c` board definition. It is derived from
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`machine/KP_9000_6XHML_X2.c` with the SFP cage order and the reset pin changed.
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The fitted T25S40 cannot be read in DIO mode on this board: an image that leaves
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DIO enabled does not come up at all, both at the default read clock divider of 4
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and at 8 (two boards tested), while the same image with single-IO boots and runs
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normally. The board definition therefore sets `flash_sio`, which makes
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`flash_init()` use `CMD_FREAD` at divider 8. Only the management plane is
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slower, the ASIC keeps forwarding in hardware.
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@@ -15,6 +15,7 @@ The following devices have been tested and are fully working:
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| Hisource | Hi-K0402WS | No | [PCB-K0402WS-V2.0](devices/PCB-K0402WS-V2.0.md) | 2M | 4 + 2 |
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| Hisource | Hi-K0402WS | No | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md) | | 4 + 2 |
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| Hisource | Hi-K0801WS | No | [PCB-KO801W-V2.0](devices/HI-K0801WS.md) | | 8 + 1 |
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| hongyavision | HYWS-SGT0204S | No | [2G5F4_10G2_V1.01](devices/2G5F4_10G2_V1.01.md) | 0.5M | 4 + 2 |
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| hongyavision | LG-SG5T1 | No | [PCB-SWTG024AS-V2.0_16895](devices/SWTG024AS-V2.0.md) | 0.5M | 5 + 1 |
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| Horaco | HC-SWTGW215AS | Yes | [SWTG024AS-A-V2.0.1_19650 5C 1SFP](devices/SWTG024AS-A-V2.0.1_5C_1SFP.md) | ? | 5 + 1 |
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| Horaco | HC-SWTGW218AS | Yes | [SWTG018AS-A V2.0](devices/SWTG018AS_A_V2_0.md) | | 8 + 1 |
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