mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-10-29 17:54:14 +08:00
test: simulate the register file and the table engine, and test the tables
The switch is reached through four register functions and the SFR_DATA registers, so a flat register file behind them is enough to run the table code on the host. A few addresses are live: writing TBL_CTRL with EXECUTE performs the VLAN or L2 operation at once and clears the bit, STAT_GET fetches a counter, L2_TBL_FLUSH_CTRL drops entries. Nothing ever reports busy, so a polling loop runs once and the tests say nothing about what happens when hardware stalls; that question was settled elsewhere. The header states the VLAN and L2 entry layouts on its own, so a test can hold what rtl837x_port.c writes against a second reading of the same bits rather than against itself. The first suite does that for the VLAN entry, the PVID register two ports share, the static multicast and management entries, the per-port flush and the trunk registers. Two stub headers stand in for the ones a firmware build generates, so the harness needs no SDCC build first.
This commit is contained in:
1 parent
83491bc9e3
commit
5620e950ce
9 files changed
+747
-2
No files matched your search
@@ -19,6 +19,16 @@ fires — so it drops straight into CI.
|
||||
- **`sdcc_shim.h`** (force-included) erases SDCC 8051 keywords (`__xdata`,
|
||||
`__code`, `__banked`, …) so firmware sources compile under host gcc. It changes
|
||||
no logic — the code under test is byte-for-byte the firmware source.
|
||||
- **`hw_mock.c` / `hw_mock.h`** simulate the ASIC edge: a flat register file
|
||||
behind `reg_read`/`reg_write` and the `SFR_DATA_*` registers, with a table
|
||||
engine that performs a VLAN or L2 operation the moment `TBL_CTRL` is written,
|
||||
fetches a MIB counter on `STAT_GET` and drops entries on `L2_TBL_FLUSH_CTRL`.
|
||||
Nothing ever reports busy, so a polling loop runs once. The header states the
|
||||
VLAN and L2 entry layouts independently of the firmware, so a test can hold
|
||||
what `rtl837x_port.c` writes against an independent statement of the layout.
|
||||
- **`env_tables.c`** carries the globals and leaf calls those two modules link
|
||||
against; **`stub/`** stands in for the two headers only a firmware build
|
||||
generates, so the harness needs no SDCC build first.
|
||||
- **`support.c` / `support.h`** mock the hardware edges: the 16-byte serial ring
|
||||
(`sbuf`), the command/history buffers, and the character-output sink
|
||||
(`write_char` etc.). Buffers are sized **exactly** as on target, so ASan
|
||||
@@ -35,6 +45,7 @@ fires — so it drops straight into CI.
|
||||
| Test binary | TU under test | Findings exercised |
|
||||
|-------------|---------------|--------------------|
|
||||
| `test_cmd_editor` | `cmd_editor.c` | **C4** — full-line hang + `cmd_buffer` 1-byte overflow; basic entry & backspace regressions |
|
||||
| `test_port_tables` | `rtl837x_port.c` | VLAN entry layout and round trip, PVID register sharing, static multicast and management entries, per-port flush, trunk membership and hash seed |
|
||||
|
||||
## Adding a test for another module
|
||||
1. Write `test_<module>.c` with `main()` driving the module's entry points and
|
||||
|
||||
Reference in new issue
Block a user