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Adding port module

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logicog
2025-06-29 11:08:37 +02:00
parent 5a87d81b8c
commit 4f799f3677
1 changed files with 1 additions and 1 deletions
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Makefile
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@@ -7,7 +7,7 @@ AFLAGS= -plosgff
all: rtlplayground.bin injector all: rtlplayground.bin injector
SRCS= rtlplayground.c rtl837x_flash.c rtl837x_phy.c SRCS= rtlplayground.c rtl837x_flash.c rtl837x_phy.c rtl837x_port.c
OBJS= ${SRCS:.c=.rel} OBJS= ${SRCS:.c=.rel}
clean: clean: