Add machine definitions

machine.c

@@ -0,0 +1,58 @@
+#include "machine.h"
+
+#ifdef MACHINE_KL_9000_6XHML_X2
+__code const struct machine machine = {
+	.machine_name = "keepLink KL-9000-6XHML-X2",
+	.isRTL8373 = 0,
+	.min_port = 3,
+	.max_port = 8,
+	.n_sfp = 2,
+	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
+	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},
+	.is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
+	.sfp_port[0].pin_detect = 45,
+	.sfp_port[0].pin_los = 21,
+	.sfp_port[0].sds = 1,
+	.sfp_port[0].i2c = 1,
+	.sfp_port[1].pin_detect = 1,
+	.sfp_port[1].pin_los = 58,
+	.sfp_port[1].sds = 0,
+	.sfp_port[1].i2c = 0,
+	.reset_pin = 49,
+};
+
+#elif MACHINE_SWGT024_V2_0
+__code const struct machine machine = {
+	.machine_name = "SWGT024 V2.0",
+	.isRTL8373 = 0,
+	.min_port = 3,
+	.max_port = 8,
+	.n_sfp = 2,
+	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
+	.phys_to_log_port = {4, 6, 5, 7, 3, 8, 0, 0, 0},
+	.is_sfp= {0, 0, 0, 2, 0, 0, 0, 0, 1},
+	.sfp_port[0].pin_detect = 1,
+	.sfp_port[0].pin_los = 58,
+	.sfp_port[0].sds = 1,
+	.sfp_port[0].i2c = 1,
+	.sfp_port[1].pin_detect = 45,
+	.sfp_port[1].pin_los = 21,
+	.sfp_port[1].sds = 0,
+	.sfp_port[1].i2c = 0,
+};
+#elif DEFAULT_8C_1SFP
+__code const struct machine machine = {
+	.machine_name = "9-Port Switch",
+	.isRTL8373 = 1,
+	.min_port = 0,
+	.max_port = 8,
+	.n_sfp = 1,
+	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
+	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
+	.is_sfp= {0, 0, 0, 0, 0, 0, 0, 0, 1},
+	.sfp_port[0].pin_detect = 1,
+	.sfp_port[0].pin_los = 58,
+	.sfp_port[0].sds = 1,
+};
+
+#endif

machine.h

@@ -0,0 +1,40 @@
+#ifndef _MACHINE_H_
+#define _MACHINE_H_
+
+#include <stdint.h>
+
+/*
+ * Select your machine type below
+ */
+#define MACHINE_KL_9000_6XHML_X2
+// #define MACHINE_SWGT024_V2_0
+// #define MACHINE_HORACO_ZX_SG4T2
+
+// #define DEFAULT_8C_1SFP
+
+// #define DEFAULT_5C_1SFP
+
+struct sfp_port
+{
+	uint8_t pin_detect; // gpio number 0-63, 0xFF = don't have it?
+	uint8_t pin_los; // gpio number 0-63, 0xFF = don't have it?
+	uint8_t sds;
+	uint8_t i2c;
+};
+
+typedef struct machine {
+	char machine_name[30];
+	uint8_t isRTL8373;
+	uint8_t min_port;
+	uint8_t max_port;
+	uint8_t n_sfp;
+	uint8_t log_to_phys_port[9];
+	uint8_t phys_to_log_port[9]; // Starts at 0 for port 1
+	uint8_t is_sfp[9];  // 0 for non-SFP ports 1 or 2 for the I2C port number
+	// sfp_port[0] is the first SFP-port from the left on the device, sfp_port[1] the next if present 
+	struct sfp_port sfp_port[2];
+	int8_t reset_pin;
+};
+
+#endif
+

rtl837x_port.c

@@ -164,11 +164,8 @@ void vlan_setup(void) __banked
 	vlan_names[0] = 0;
 
 	// Initialize VLAN table for VLAN 1, by disabling that entry
-	if (machine.isRTL8373) {
+	REG_SET(RTL837x_TBL_DATA_IN_A, machine.isRTL8373? 0x0007ffff : 0x0007e3f8);
-		REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007ffff);
+
-	} else {
-		REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007e3f8);
-	}
 	REG_SET(RTL837X_TBL_CTRL, 0x00010303);
 	do {
 		reg_read_m(RTL837X_TBL_CTRL);
@@ -211,11 +208,8 @@ void vlan_setup(void) __banked
 	REG_SET(RTL837X_VLAN_L2_LRN_DIS_1, 0);
 
 	// Enable VLAN 1: Ports 0-9, i.e. including the CPU port are untagged members
-	if (machine.isRTL8373) {
+	REG_SET(RTL837x_TBL_DATA_IN_A, machine.isRTL8373? 0x0207ffff : 0x0207e3f8);	// 02: Entry valid, 7...: membership
-		REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207ffff);	// 02: Entry valid, 7ffff: membership
+
-	} else {
-		REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207e3f8);
-	}
 	REG_SET(RTL837X_TBL_CTRL, 0x00010303);	// Write VLAN 1
 	do {
 		reg_read_m(RTL837X_TBL_CTRL);
@@ -246,7 +240,7 @@ uint8_t port_l2_forget(void) __banked
 	REG_SET(RTL837x_L2_TBL_FLUSH_CNF, 0x0);
 
 	// Flush L2 table for all ports by setting the ports and the flush-exec bit (bit 16)
-	REG_SET(RTL837x_L2_TBL_FLUSH_CTRL, machine.isRTL8373 ? L2_TBL_FLUSH_EXEC | PMASK_9 : L2_TBL_FLUSH_EXEC | PMASK_6);
+	REG_SET(RTL837x_L2_TBL_FLUSH_CTRL, L2_TBL_FLUSH_EXEC | (machine.isRTL8373 ? PMASK_9 : PMASK_6));
 
 	// Wait for flush completed
 	do {
@@ -341,11 +335,7 @@ void port_l2_setup(void) __banked
 
 		// All ports may communicate with each other and CPU-Port
 		reg = RTL837X_PORT_ISOLATION_BASE + (i << 2);
-		if(machine.isRTL8373) {
+		REG_SET(reg, PMASK_CPU | (machine.isRTL8373? PMASK_9 : PMASK_6));
-			REG_SET(reg, PMASK_9 | PMASK_CPU);
-		} else {
-			REG_SET(reg, PMASK_6 | PMASK_CPU);
-		}
 	}
 	// When maximim entries learned, then simply flood the packet
 	reg_bit_set(RTL837X_L2_LRN_PORT_CONSTRT_ACT, 0);