From 45213b4eaca9d651c5d1879955a8b01df8d75ffc Mon Sep 17 00:00:00 2001
From: logicog <git@logicog.de>
Date: Thu, 29 Jan 2026 19:03:02 +0100
Subject: [PATCH] Add MACHINE_HG0402XG_V1_1

---
 machine.c       | 22 ++++++++++++++++++++++
 machine.h       |  4 ++--
 rtl837x_regs.h  |  1 +
 rtlplayground.c | 43 +++++++++++++++++++++++++++++++++++++++++--
 4 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/machine.c b/machine.c
index 84f1d2c..aa43ef5 100644
--- a/machine.c
+++ b/machine.c
@@ -83,6 +83,28 @@ __code const struct machine machine = {
 	.reset_pin = GPIO36_PWM_OUT,
 };
 
+#elif defined MACHINE_HG0402XG_V1_1
+__code const struct machine machine = {
+	.machine_name = "HG0402XG V1.1",
+	.isRTL8373 = 0,
+	.min_port = 3,
+	.max_port = 8,
+	.n_sfp = 2,
+	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
+	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},
+	.is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
+	.sfp_port[0].pin_detect = 50,
+	.sfp_port[0].pin_los = 10,
+	.sfp_port[0].pin_tx_disable = 0xFF,
+	.sfp_port[0].sds = 1,
+	.sfp_port[0].i2c_bus ={ .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 },
+	.sfp_port[1].pin_detect = 30,
+	.sfp_port[1].pin_los = 51,
+	.sfp_port[1].pin_tx_disable = 0xFF,
+	.sfp_port[1].sds = 0,
+	.sfp_port[1].i2c_bus = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
+};
+
 #elif defined DEFAULT_8C_1SFP
 __code const struct machine machine = {
 	.machine_name = "8+1 SFP Port Switch",
diff --git a/machine.h b/machine.h
index b1051b3..a11a2ef 100644
--- a/machine.h
+++ b/machine.h
@@ -6,12 +6,12 @@
 /*
  * Select your machine type below
  */
-#define MACHINE_KP_9000_6XHML_X2
+// #define MACHINE_KP_9000_6XHML_X2
 // #define MACHINE_KP_9000_6XH_X
 // #define MACHINE_KP_9000_9XH_X_EU
 // #define MACHINE_SWGT024_V2_0
 // #define MACHINE_HORACO_ZX_SG4T2
-
+#define MACHINE_HG0402XG_V1_1
 // #define DEFAULT_8C_1SFP
 
 // #define DEFAULT_5C_1SFP
diff --git a/rtl837x_regs.h b/rtl837x_regs.h
index cd7a2eb..09fa1bc 100644
--- a/rtl837x_regs.h
+++ b/rtl837x_regs.h
@@ -22,6 +22,7 @@
 // Blink rate is defined by setAsicRegBits(0x6520,0xe00000,rate);
 #define RTL837X_REG_LED_GLB_IO_EN	0x65DC
 #define RTL837X_REG_LED3_0_SET1		0x6528
+#define RTL837X_REG_LED1_0_SET1		0x6540
 #define RTL837X_REG_LED3_2_SET0		0x6544
 #define RTL837X_REG_LED1_0_SET0		0x6548
 
diff --git a/rtlplayground.c b/rtlplayground.c
index b2bc882..75d5442 100644
--- a/rtlplayground.c
+++ b/rtlplayground.c
@@ -1499,6 +1499,44 @@ void set_sys_led_state(uint8_t state)
 	reg_write_m(RTL837X_REG_LED_MODE);
 }
 
+
+#ifdef MACHINE_HG0402XG_V1_1
+void led_config(void)
+{
+	reg_read_m(RTL837X_REG_LED_MODE);
+	sfr_mask_data(2, 0xe0, 0x23); 	// Mask blink rate field (0xe0), set blink rate and LED to solid (set bit 1 = bit 17 overal
+	// Configure led-mode (serial?)
+	sfr_data[2] = 0xe6;
+	sfr_data[3] = 0xb0;
+	reg_write_m(RTL837X_REG_LED_MODE);
+	// Disable RLDP (Realtek Loop Detection Protocol) LEDs on loop detection
+	reg_read_m(RTL837X_REG_LED_RLDP_1);
+	sfr_mask_data(0, 0x03, 0);
+	reg_write_m(RTL837X_REG_LED_RLDP_1);
+	REG_SET(RTL837X_REG_LED_RLDP_2, 0xffff0000);	// Ports 0-7 0x65fc
+	REG_SET(RTL837X_REG_LED_RLDP_3, 0x0000000f);	// Port 8
+
+	reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 29);
+	reg_bit_clear(RTL837X_REG_LED_GLB_IO_EN, 27);
+	reg_bit_set(RTL837X_PIN_MUX_0, 29);
+	reg_bit_set(RTL837X_PIN_MUX_0, 27);
+
+	REG_SET(RTL837X_REG_LED1_0_SET0, 0x141); // 0x6548
+	reg_read_m(RTL837X_REG_LED3_2_SET0);
+	sfr_data[2] = 0x01;
+	sfr_data[3] = 0x74;
+	reg_write_m(RTL837X_REG_LED3_2_SET0);
+	reg_read_m(RTL837X_REG_LED1_0_SET1); // 6540
+	sfr_data[2] = 0x01;
+	sfr_data[3] = 0x7f;
+	reg_write_m(RTL837X_REG_LED1_0_SET1);
+
+	reg_read_m(RTL837X_REG_LED3_0_SET1);
+	sfr_data[1] |= 0x0f;
+	reg_write_m(RTL837X_REG_LED3_0_SET1);
+}
+
+#else
 void led_config(void)
 {
 	// LED initialization
@@ -1547,6 +1585,7 @@ void led_config(void)
 	sfr_data[3] = 0x11;
 	reg_write_m(RTL837X_REG_LED3_0_SET1);
 }
+#endif
 
 void rtl8373_revision(void)
 {
@@ -1965,7 +2004,7 @@ void bootloader(void)
 	flash_region.addr = FIRMWARE_UPLOAD_START;
 	flash_region.len = 0x100;
 	flash_read_bulk(flash_buf);
-
+#ifndef MACHINE_HG0402XG_V1_1
 	if (flash_buf[0] == 0x00 && flash_buf[1] == 0x40) {
 		__xdata uint32_t dest = 0x0;
 		__xdata uint32_t source = FIRMWARE_UPLOAD_START;
@@ -2036,7 +2075,7 @@ void bootloader(void)
 			dest += 0x1000;
 		}
 	}
-
+#endif
 	set_sys_led_state(SYS_LED_SLOW);
 
 #ifdef DEBUG