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port: report link role and negotiated pause per port
Two per-port MAC status registers that nothing in the firmware reads: 0x6408 says which end is master on a BASE-T link, 0x63FC and 0x6400 say whether pause was negotiated in each direction. port <n> show prints both at the end. The read sits in rtl837x_port.c rather than phy_show(), because these are MAC registers and phy_show() is skipped for SFP ports. Master/slave keys off machine.is_sfp[] so it stays off the fibre ports, where the notion does not apply. Bit N of each register is chip port N, which is not how RTL837X_REG_LINKS_STS indexes its bytes a few lines above in the same header.
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@@ -893,7 +893,10 @@ void parse_port(void)
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print_string_x(port_names[phy_settings.port]);
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print_string_x(port_names[phy_settings.port]);
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if (!machine.is_sfp[phy_settings.port]) {
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if (!machine.is_sfp[phy_settings.port]) {
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phy_show(phy_settings.port);
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phy_show(phy_settings.port);
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} else {
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write_char('\n');
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}
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}
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port_media_show(phy_settings.port);
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} else if (cmd_compare(2, "name")) {
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} else if (cmd_compare(2, "name")) {
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uint8_t i = 0;
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uint8_t i = 0;
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while ( (i < PORT_NAME_SIZE-1) && (cmd_buffer[cmd_words_b[3] + i] != NUL) ) {
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while ( (i < PORT_NAME_SIZE-1) && (cmd_buffer[cmd_words_b[3] + i] != NUL) ) {
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@@ -487,6 +487,38 @@ void port_l2_setup(void) __banked
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}
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}
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void port_media_show(uint8_t port) __banked
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{
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uint8_t pause;
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if (!machine.is_sfp[port]) {
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reg_read_m(RTL837X_REG_LINKS_STS);
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if (sfr_data[(port / 8) + 1] >> (port % 8) & 1) {
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print_string("Link role: ");
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reg_read_m(RTL837X_MAC_MSTR_SLV_STS);
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if (sfr_data[3 - (port >> 3)] & (1 << (port & 7)))
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print_string("master\n");
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else
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print_string("slave\n");
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}
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}
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print_string("Pause negotiated:");
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reg_read_m(RTL837X_MAC_TX_PAUSE_STS);
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pause = sfr_data[3 - (port >> 3)] & (1 << (port & 7));
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if (pause)
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print_string(" TX");
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reg_read_m(RTL837X_MAC_RX_PAUSE_STS);
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if (sfr_data[3 - (port >> 3)] & (1 << (port & 7))) {
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print_string(" RX");
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pause = 1;
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}
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if (!pause)
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print_string(" none");
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write_char('\n');
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}
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void port_stats_print(void) __banked
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void port_stats_print(void) __banked
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{
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{
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print_string("\nPort\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\n");
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print_string("\nPort\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\n");
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@@ -49,6 +49,7 @@ extern __xdata struct vlan_settings vlan_settings;
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uint8_t port_l2_forget(void) __banked;
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uint8_t port_l2_forget(void) __banked;
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void port_l2_learned(void) __banked;
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void port_l2_learned(void) __banked;
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void port_stats_print(void) __banked;
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void port_stats_print(void) __banked;
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void port_media_show(uint8_t port) __banked;
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int8_t vlan_get(uint16_t vlan) __banked;
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int8_t vlan_get(uint16_t vlan) __banked;
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__xdata uint16_t vlan_name(uint16_t vlan) __banked;
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__xdata uint16_t vlan_name(uint16_t vlan) __banked;
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void vlan_name_remove(uint16_t vlan) __banked;
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void vlan_name_remove(uint16_t vlan) __banked;
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@@ -83,6 +83,10 @@
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#define RTL837X_REG_LINKS 0x63f0
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#define RTL837X_REG_LINKS 0x63f0
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#define RTL837X_REG_LINKS_89 0x63f4
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#define RTL837X_REG_LINKS_89 0x63f4
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#define RTL837X_REG_LINKS_STS 0x63E8
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#define RTL837X_REG_LINKS_STS 0x63E8
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/* Per-port status bits: bit N is chip port N */
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#define RTL837X_MAC_TX_PAUSE_STS 0x63FC
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#define RTL837X_MAC_RX_PAUSE_STS 0x6400
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#define RTL837X_MAC_MSTR_SLV_STS 0x6408
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/* Each nibble encodes the link state of a port.
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/* Each nibble encodes the link state of a port.
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Port 0 appears to be the CPU port
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Port 0 appears to be the CPU port
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