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Fix output of l2 command

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logicog
2026-01-17 12:56:43 +01:00
parent 73a355cff5
commit 300f599551
1 changed files with 16 additions and 18 deletions
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rtl837x_port.c
+16 -18
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@@ -263,14 +263,23 @@ void port_l2_learned(void) __banked
__xdata uint16_t first_entry = 0xffff; // Table does not have that many entries __xdata uint16_t first_entry = 0xffff; // Table does not have that many entries
while (1) { while (1) {
uint8_t port = 0, other = 0; uint8_t port = 0;
reg_read_m(RTL837x_TBL_DATA_0); reg_read_m(RTL837x_TBL_DATA_0);
REG_WRITE(RTL837x_TBL_DATA_0, sfr_data[0], sfr_data[1],sfr_data[2] | 0xc0, sfr_data[3]); REG_WRITE(RTL837x_TBL_DATA_0, sfr_data[0], sfr_data[1],sfr_data[2] | 0xc0, sfr_data[3]);
REG_WRITE(RTL837X_TBL_CTRL, entry >> 8, entry, TBL_L2_UNICAST, 0x1); REG_WRITE(RTL837X_TBL_CTRL, (entry >> 8) & 0xf, entry, TBL_L2_UNICAST, TBL_EXECUTE);
do { do {
reg_read_m(RTL837X_TBL_CTRL); reg_read_m(RTL837X_TBL_CTRL);
} while (sfr_data[3] & 0x1); } while (sfr_data[3] & TBL_EXECUTE);
reg_read_m(RTL837x_TBL_DATA_0);
entry = (((uint16_t)sfr_data[2] & 0x0f) << 8) | sfr_data[3];
if (first_entry == 0xffff) {
first_entry = entry;
} else {
if (first_entry == entry)
break;
}
// MAC // MAC
reg_read_m(RTL837x_L2_DATA_OUT_B); reg_read_m(RTL837x_L2_DATA_OUT_B);
@@ -278,7 +287,6 @@ void port_l2_learned(void) __banked
print_byte(sfr_data[2]); write_char(':'); print_byte(sfr_data[2]); write_char(':');
print_byte(sfr_data[3]); write_char(':'); print_byte(sfr_data[3]); write_char(':');
port = (sfr_data[0] >> 6) & 0x3; port = (sfr_data[0] >> 6) & 0x3;
other = sfr_data[0];
reg_read_m(RTL837x_L2_DATA_OUT_A); reg_read_m(RTL837x_L2_DATA_OUT_A);
print_byte(sfr_data[0]); write_char(':'); print_byte(sfr_data[0]); write_char(':');
print_byte(sfr_data[1]); write_char(':'); print_byte(sfr_data[1]); write_char(':');
@@ -298,22 +306,12 @@ void port_l2_learned(void) __banked
port |= (sfr_data[3] & 0x3) << 2; port |= (sfr_data[3] & 0x3) << 2;
if (port < 9) if (port < 9)
write_char('1' + port); write_char(machine.log_to_phys_port[port] + '0');
else else
print_string("10"); print_string("CPU");
} }
reg_read_m(RTL837x_TBL_DATA_0);
entry = (((uint16_t)sfr_data[2] & 0x0f) << 8) | sfr_data[3] + 1; entry++;
if (first_entry == 0xffff) {
first_entry = entry;
} else {
if (first_entry == entry)
break;
}
#ifdef DEBUG
write_char(' '); print_sfr_data();
write_char(' '); print_byte(other);
#endif
print_string("\n"); print_string("\n");
} }
} }