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https://github.com/logicog/RTLPlayground.git
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Add more options to Link configuration and status display
This commit is contained in:
logicog
+176
-21
@@ -182,49 +182,204 @@ void phy_config_8224(void) __banked
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/*
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* Set Speed, duplex and flow control mode of a PHY
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* Set Speed of a PHY
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* See e.g. RTL8221B datasheet
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*/
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void phy_set_mode(uint8_t port, uint8_t speed, uint8_t flow_control, uint8_t duplex) __banked
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void phy_set_speed(uint8_t port, uint8_t speed) __banked
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{
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uint16_t v;
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phy_read(port, 0x1f, 0xa610);
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phy_read(port, PHY_MMD_CTRL, 0xa610);
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v = SFR_DATA_U16;
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if (speed == PHY_OFF) {
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phy_write(port, 0x1f, 0xa610, v | 0x0800);
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phy_write(port, PHY_MMD_CTRL, 0xa610, v | 0x0800);
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return;
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}
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// Port is on, make sure of it:
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if (v & 0x0800)
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phy_write(port, 0x1f, 0xa610, v & 0xf7ff);
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phy_write(port, PHY_MMD_CTRL, 0xa610, v & 0xf7ff);
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if (speed == PHY_SPEED_AUTO) {
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// AN Advertisement Register (MMD 7.0x0010)
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phy_write(port, PHY_MMD_AN, 0x10, 0x1001); // bits 0-4: 0x1 (802.3 supported), Extended Next Page format used
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// bits 0-4: 0x1 (802.3 supported), Extended Next Page format used
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phy_write(port, PHY_MMD_AN, 0x10, 0x15e1);
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// Multi-GBASE-TBASE-T AN Control 1 Register (MMD 7.0x0020)
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phy_write(port, 0x07, 0x20, 0x6081); // bit 14: SLAVE, bit 13: Multi-Port device, bit 8: 2.5GBit available, 1: LD Loop timing enabled
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phy_write(port, 0x07, 0x00, 0x3200); // Restart AN
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// bit 14: SLAVE, bit 13: Multi-Port device, bit 8: 2.5GBit available, 1: LD
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phy_write(port, PHY_MMD_AN, 0x20, 0x6081);
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// GBCR (1000Base-T Control Register, MMD 31.0xA412)
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phy_modify(port, PHY_MMD_CTRL, 0xa412, 0x0000, 0x0200); // Loop timing enabled
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phy_write(port, PHY_MMD_AN, 0x00, 0x3200); // Restart AN
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} else {
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// AN Control Register (MMD 7.0x0000)
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phy_write(port, PHY_MMD_AN, 0x00, 0x2000); // Clear bit 12: No Autoneg, Set Extended Pages (bit 13)
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// AN Advertisement Register (MMD 7.0x0010)
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phy_write(port, PHY_MMD_AN, 0x10, 0x1001); // bits 0-4: 0x1 (802.3 supported), Extended Next Page format used
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if (speed == PHY_SPEED_1G) {
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// Multi-GBASE-TBASE-T AN Control 1 Register (MMD 7.0x0020)
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phy_write(port, PHY_MMD_AN, 0x20, 0x6001); // bit 14: SLAVE, bit 13: Multi-Port device, 1: LD Loop timin enableed
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// GBCR (1000Base-T Control Register, MMD 31.0xA412)
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phy_modify(port, 0x1f, 0xa412, 0x0000, 0x0200);
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} else if (speed == PHY_SPEED_2G5) {
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// Multi-GBASE-TBASE-T AN Control 1 Register (MMD 7.0x0020)
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phy_write(port, PHY_MMD_AN, 0x20, 0x6081); // bit 14: SLAVE, bit 13: Multi-Port device, bit 8: 2.5GBit available, 1: LD Loop timin enableed
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// GBCR (1000Base-T Control Register, MMD 31.0xA412)
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phy_modify(port, 0x1f, 0xa412, 0x0200, 0x0000);
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if (speed == PHY_SPEED_10M) {
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phy_write(port, PHY_MMD_AN, 0x20, 0x6001);
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phy_write(port, PHY_MMD_AN, 0x10, 0x1461);
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phy_modify(port, PHY_MMD_CTRL, 0xa412, 0x0200, 0x0000);
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} else if (speed == PHY_SPEED_100M) {
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phy_write(port, PHY_MMD_AN, 0x20, 0x6001);
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phy_write(port, PHY_MMD_AN, 0x10, 0x1581);
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phy_modify(port, PHY_MMD_CTRL, 0xa412, 0x0200, 0x0000);
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} else {
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// AN Advertisement Register (MMD 7.0x0010)
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// bits 0-4: 0x1 (802.3 supported), Extended Next Page format used
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phy_write(port, PHY_MMD_AN, 0x10, 0x1001);
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if (speed == PHY_SPEED_1G) {
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// Multi-GBASE-TBASE-T AN Control 1 Register (MMD 7.0x0020)
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// bit 14: SLAVE, bit 13: Multi-Port device, 1: LD Loop timin enableed
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phy_write(port, PHY_MMD_AN, 0x20, 0x6001);
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// GBCR (1000Base-T Control Register, MMD 31.0xA412)
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phy_modify(port, PHY_MMD_CTRL, 0xa412, 0x0000, 0x0200);
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} else if (speed == PHY_SPEED_2G5) {
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// Multi-GBASE-TBASE-T AN Control 1 Register (MMD 7.0x0020)
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// bit 14: SLAVE, bit 13: Multi-Port device, bit 8: 2.5GBit available, 1: LD Loop timin enableed
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phy_write(port, PHY_MMD_AN, 0x20, 0x6081);
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// GBCR (1000Base-T Control Register, MMD 31.0xA412)
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phy_modify(port, PHY_MMD_CTRL, 0xa412, 0x0200, 0x0000);
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}
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}
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phy_write(port, PHY_MMD_AN, 0x00, 0x3200); // Enable AN
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phy_write(port, PHY_MMD_AN, 0x00, 0x3000); // Enable AN
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}
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}
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void phy_set_duplex(uint8_t port, uint8_t fullduplex) __banked
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{
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uint16_t v;
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phy_read(port, PHY_MMD_AN, 0x00);
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v = SFR_DATA_U16;
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if (!(v & 0x1000)) { // AN disabled, we are in forced mode
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phy_read(port, PHY_MMD_CTRL, 0xa400);
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v = SFR_DATA_U16;
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if (fullduplex)
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v |= 0x0100;
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else
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v &= 0xfeff;
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phy_write(port, PHY_MMD_CTRL, 0xa400, v);
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return;
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}
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// Disable AN
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phy_write(port, PHY_MMD_AN, 0x00, 0x2000);
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phy_read(port, PHY_MMD_AN, 0x10);
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v = SFR_DATA_U16;
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if (v & 0x0060) {
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if (fullduplex)
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phy_modify(port, PHY_MMD_AN, 0x10, 0xffbf, 0x0040);
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else
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phy_modify(port, PHY_MMD_AN, 0x10, 0xffdf, 0x0020);
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}
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if (v & 0x0180) {
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if (fullduplex)
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phy_modify(port, PHY_MMD_AN, 0x10, 0xfeff, 0x0100);
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else
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phy_modify(port, PHY_MMD_AN, 0x10, 0xff7f, 0x0080);
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}
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// Restart AN
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phy_write(port, PHY_MMD_AN, 0x00, 0x3000);
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}
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void phy_show(uint8_t port) __banked
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{
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uint16_t v;
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phy_read(port, PHY_MMD_AN, 0x00);
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v = SFR_DATA_U16;
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if (!(v & 0x1000)) { // AN disabled, we are in forced mode
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phy_read(port, PHY_MMD_PMAPMD, 0);
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v = SFR_DATA_U16;
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print_string("\nForced speed: "); print_short(v); write_char('\n');
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uint8_t s1 = ((v & 0x40) ? 0x2 : 0x0) | ((v & 0x2000) ? 0x1 : 0x0);
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uint8_t s2 = (v >> 2) & 0xf;
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print_string("s1, s2: "); print_byte(s1); write_char(' '); print_byte(s2); write_char('\n');
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switch(s1) {
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case 0:
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print_string("10M\n");
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break;
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case 1:
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print_string("100M\n");
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break;
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case 2:
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print_string("1000M\n");
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break;
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case 3:
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switch (s2) {
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case 0:
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print_string("10G\n");
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break;
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case 6:
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print_string("2500M\n");
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break;
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case 7:
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print_string("5G\n");
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break;
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default:
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print_string("Unknown\n");
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break;
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}
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break;
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default:
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print_string("Unknown\n");
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}
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phy_read(port, PHY_MMD_CTRL, 0xa400);
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v = SFR_DATA_U16;
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print_string("Duplex: "); print_short(v); print_string(" enabled: ");
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if (v & 0x100)
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print_string("yes");
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else
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print_string("no");
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write_char('\n');
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} else {
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print_string("\nAN enabled, advertising:");
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phy_read(port, PHY_MMD_AN, 0x10);
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v = SFR_DATA_U16;
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if (v & 0x0040)
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print_string(" 10Base-Half");
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if (v & 0x0040)
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print_string(" 10Base-Full");
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if (v & 0x0080)
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print_string(" 100Base-Half");
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if (v & 0x0100)
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print_string(" 100Base-Full");
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phy_read(port, PHY_MMD_CTRL, 0xa412);
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v = SFR_DATA_U16;
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if (v & 0x0200)
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print_string(" 1000Base-Full");
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phy_read(port, PHY_MMD_AN, 0x10);
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v = SFR_DATA_U16;
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if (v & 0x0080)
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print_string(" 2500BaseN-Full");
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}
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phy_read(port, PHY_MMD_AN, 0x13);
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v = SFR_DATA_U16;
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print_string("\nLink Partner advertises:");
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if (v & 0x0020)
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print_string(" 10Base-Half");
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if (v & 0x0040)
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print_string(" 10Base-Full");
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if (v & 0x0080)
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print_string(" 100Base-Half");
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if (v & 0x0100)
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print_string(" 100Base-Full");
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phy_read(port, PHY_MMD_CTRL, 0xa414);
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v = SFR_DATA_U16;
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if (v & 0x0400)
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print_string(" 1000Base-Half");
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if (v & 0x0800)
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print_string(" 1000Base-Full");
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phy_read(port, PHY_MMD_AN, 33);
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v = SFR_DATA_U16;
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if (v & 0x0020)
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print_string(" 2500Base-Full");
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if (v & 0x0040)
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print_string(" 5000Base-Full");
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if (v & 0x0800)
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print_string(" 10GBase-Full");
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write_char('\n');
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}
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void phy_reset(uint8_t port) __banked
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{
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uint16_t v;
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