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https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
Replace phy_write_mask(0x1 with phy_write(0x00.
Also added define `RTL8224_PHY_ID` for RTL8224 phy_id. So it is more clear that we want to talk to that phy. Replaced in the function which contains `8224` in the name the `phy_write(0x00, ...)` with `phy_write(RTL8224_PHY_ID, ...)`, same for the `phy_read(0x00, ...)` with `phy_read(RTL8224_PHY_ID, ...)`. Removed the extra `phy_read()` in `rtl8224_phy_enable()`.
This commit is contained in:
committed by
René van Dorst
parent
cc132a8734
commit
22dccbad8c
+19
-15
@@ -6,6 +6,9 @@
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#define REGDBG
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#define REGDBG
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// Phy ID of the external RTL8224 PHY.
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#define RTL8224_PHY_ID 0x00
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#include <stdint.h>
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#include <stdint.h>
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#include "rtl837x_common.h"
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#include "rtl837x_common.h"
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#include "rtl837x_sfr.h"
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#include "rtl837x_sfr.h"
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@@ -66,11 +69,13 @@ __code uint16_t rtl8224_cb[60] = {
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void rtl8224_phy_enable(void) __banked
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void rtl8224_phy_enable(void) __banked
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{
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{
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uint16_t pval;
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// p001e.0a90:00f3 R02f8-000000f3 R02f4-000000fc P000001.1e000a90:00fc
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// p001e.0a90:00f3 R02f8-000000f3 R02f4-000000fc P000001.1e000a90:00fc
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print_string("\r\nrtl8224_phy_enable called\r\n");
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print_string("\r\nrtl8224_phy_enable called\r\n");
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phy_read(0, 0x1e, 0xa90);
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phy_read(RTL8224_PHY_ID, 0x1e, 0xa90);
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uint16_t pval = SFR_DATA_U16;
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pval = SFR_DATA_U16;
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// PHY Initialization:
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// PHY Initialization:
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REG_WRITE(0x2f8, 0, 0, pval >> 8, pval);
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REG_WRITE(0x2f8, 0, 0, pval >> 8, pval);
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@@ -78,12 +83,9 @@ void rtl8224_phy_enable(void) __banked
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pval |= 0x0c;
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pval |= 0x0c;
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REG_WRITE(0x2f4, 0, 0, pval >> 8, pval);
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REG_WRITE(0x2f4, 0, 0, pval >> 8, pval);
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phy_write_mask(0x1, 0x1e, 0xa90, pval);
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phy_write(RTL8224_PHY_ID, 0x1e, 0xa90, pval);
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phy_read(0, 0x1e, 0xa90);
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pval = SFR_DATA_U16;
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delay(50);
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delay(50);
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print_string("\r\nrtl8224_phy_enable done\r\n");
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print_string("\r\nrtl8224_phy_enable done\r\n");
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}
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}
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@@ -167,26 +169,28 @@ void phy_config(uint8_t phy) __banked
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void phy_config_8224(void) __banked
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void phy_config_8224(void) __banked
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{
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{
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// p001e.7b20:0bff R02f8-00000bff R02f4-00000bed P000001.1e007b20:0bed
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uint16_t pval;
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uint16_t pval;
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print_string("\r\nphy_config_8224 called\r\n");
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print_string("\r\nphy_config_8224 called\r\n");
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phy_read(0, 0x1e, 0x7b20);
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// p001e.7b20:0bff R02f8-00000bff R02f4-00000bed P000001.1e007b20:0bed
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phy_read(RTL8224_PHY_ID, 0x1e, 0x7b20);
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pval = SFR_DATA_U16;
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pval = SFR_DATA_U16;
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REG_WRITE(0x2f8, 0, 0, pval >> 8, pval);
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REG_WRITE(0x2f8, 0, 0, pval >> 8, pval);
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pval &= 0x0fe0;
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pval &= 0x0fe0;
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pval |= 0x000d;
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pval |= 0x000d;
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REG_WRITE(0x2f4, 0, 0, pval >> 8, pval);
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REG_WRITE(0x2f4, 0, 0, pval >> 8, pval);
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phy_write_mask(0x01, 0x1e, 0x7b20, pval);
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phy_write(RTL8224_PHY_ID, 0x1e, 0x7b20, pval);
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uint8_t i = 0;
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uint8_t i = 0;
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while (rtl8224_ca[i]) {
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while (rtl8224_ca[i]) {
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phy_write_mask(0x1, 0x1e, 0x400, rtl8224_ca[i]);
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phy_write(RTL8224_PHY_ID, 0x1e, 0x400, rtl8224_ca[i]);
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i++;
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i++;
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phy_write_mask(0x1, 0x1e, 0x3f8, rtl8224_ca[i]);
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phy_write(RTL8224_PHY_ID, 0x1e, 0x3f8, rtl8224_ca[i]);
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i++;
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i++;
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do {
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do {
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phy_read(0, 0x1e, 0x3f8);
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phy_read(RTL8224_PHY_ID, 0x1e, 0x3f8);
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} while (SFR_DATA_8 & 0x80);
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} while (SFR_DATA_8 & 0x80);
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}
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}
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